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Searched refs:INVALIDATE_L2_CACHE (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgmc_v6_0.c402 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in gmc_v6_0_gart_enable()
Dgmc_v7_0.c518 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gmc_v7_0_gart_enable()
Dgmc_v8_0.c628 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gmc_v8_0_gart_enable()
/drivers/gpu/drm/radeon/
Drv770d.h649 #define INVALIDATE_L2_CACHE (1 << 1) macro
Dnid.h119 #define INVALIDATE_L2_CACHE (1 << 1) macro
Dsid.h380 #define INVALIDATE_L2_CACHE (1 << 1) macro
Dcikd.h500 #define INVALIDATE_L2_CACHE (1 << 1) macro
Devergreend.h1157 #define INVALIDATE_L2_CACHE (1 << 1) macro
Dr600d.h594 #define INVALIDATE_L2_CACHE (1 << 1) macro
Dni.c1304 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cayman_pcie_gart_enable()
Dsi.c4303 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in si_pcie_gart_enable()
Dcik.c5501 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cik_pcie_gart_enable()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h382 #define INVALIDATE_L2_CACHE (1 << 1) macro