| /drivers/net/wireless/ath/wil6210/ |
| D | Kconfig | 18 bool "Use Clear-On-Read mode for ISR registers for wil6210"
22 ISR registers on wil6210 chip may operate in either
26 For ISR debug, use W1C (say n); is allows to monitor ISR
27 registers with debugfs. If COR were used, ISR would
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| /drivers/net/ethernet/cadence/ |
| D | macb.c | 670 queue_writel(queue, ISR, MACB_BIT(TCOMP)); in macb_tx_interrupt()
1078 macb_writel(bp, ISR, MACB_BIT(RCOMP)); in macb_poll()
1097 status = queue_readl(queue, ISR); in macb_interrupt()
1109 queue_writel(queue, ISR, -1); in macb_interrupt()
1126 queue_writel(queue, ISR, MACB_BIT(RCOMP)); in macb_interrupt()
1139 queue_writel(queue, ISR, MACB_TX_ERR_FLAGS); in macb_interrupt()
1164 queue_writel(queue, ISR, MACB_BIT(RXUBR)); in macb_interrupt()
1175 queue_writel(queue, ISR, MACB_BIT(ISR_ROVR)); in macb_interrupt()
1186 queue_writel(queue, ISR, MACB_BIT(HRESP)); in macb_interrupt()
1189 status = queue_readl(queue, ISR); in macb_interrupt()
[all …]
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| D | macb.h | 785 unsigned int ISR; member
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| /drivers/rtc/ |
| D | rtc-at32ap700x.c | 101 alrm->pending = rtc_readl(rtc, ISR) & RTC_BIT(ISR_TOPI) ? 1 : 0; in at32_rtc_readalarm()
168 unsigned long isr = rtc_readl(rtc, ISR); in at32_rtc_interrupt()
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| /drivers/net/ethernet/realtek/ |
| D | atp.c | 616 int status = read_nibble(ioaddr, ISR); in atp_interrupt()
621 write_reg(ioaddr, ISR, ISR_RxOK); /* Clear the Rx interrupt. */ in atp_interrupt()
634 write_reg_high(ioaddr, ISR, ISRh_RxErr); in atp_interrupt()
647 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK); in atp_interrupt()
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| D | atp.h | 39 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
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| /drivers/usb/serial/ |
| D | io_16654.h | 37 #define ISR 2 // Interrupt Status Register (Read) macro
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| /drivers/net/ethernet/ |
| D | fealnx.c | 174 ISR = 0x34, /* interrupt status */ enumerator
906 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in netdev_open()
1097 "config %8.8x.\n", dev->name, ioread32(ioaddr + ISR), in netdev_timer()
1168 iowrite32(FBE | TUNF | CNTOVF | RBU | TI | RI, ioaddr + ISR); in enable_rxtx()
1208 dev->name, ioread32(ioaddr + ISR)); in fealnx_tx_timeout()
1447 u32 intr_status = ioread32(ioaddr + ISR); in intr_handler()
1450 iowrite32(intr_status, ioaddr + ISR); in intr_handler()
1600 dev->name, ioread32(ioaddr + ISR)); in intr_handler()
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| /drivers/net/irda/ |
| D | w83977af_ir.h | 59 #define ISR 0x02 /* Interrupt status register */ macro
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| /drivers/net/ethernet/via/ |
| D | via-velocity.h | 995 volatile __le32 ISR; /* 0x24 */ member
1157 #define mac_read_isr(regs) readl(&((regs)->ISR))
1158 #define mac_write_isr(regs, x) writel((x),&((regs)->ISR))
1159 #define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR))
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| /drivers/video/fbdev/i810/ |
| D | i810_regs.h | 47 #define ISR 0x020AC macro
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| /drivers/video/fbdev/ |
| D | i740_reg.h | 232 #define ISR 0x3036 macro
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| /drivers/media/common/saa7146/ |
| D | saa7146_core.c | 300 ack_isr = isr = saa7146_read(dev, ISR); in interrupt_hw()
346 saa7146_write(dev, ISR, ack_isr); in interrupt_hw()
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| /drivers/atm/ |
| D | firestream.h | 295 #define ISR 0x64 macro
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| D | firestream.c | 1572 status = read_fs (dev, ISR); in fs_irq()
1714 isr = read_fs (dev, ISR); in fs_init()
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| /drivers/block/rsxx/ |
| D | rsxx_priv.h | 196 ISR = 0x10, /* Interrupt Status Register */ enumerator
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| D | core.c | 361 isr = ioread32(card->regmap + ISR); in rsxx_isr()
696 st = ioread32(card->regmap + ISR); in rsxx_slot_reset()
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 239 ISR = 0x0f8, enumerator
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| D | r8192E_dev.c | 2246 tmp = rtl92e_readl(dev, ISR); in rtl92e_clear_irq()
2247 rtl92e_writel(dev, ISR, tmp); in rtl92e_clear_irq()
2274 *p_inta = rtl92e_readl(dev, ISR); in rtl92e_ack_irq()
2275 rtl92e_writel(dev, ISR, *p_inta); in rtl92e_ack_irq()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192se/ |
| D | hw.c | 1579 *p_inta = rtl_read_dword(rtlpriv, ISR) & rtlpci->irq_mask[0]; in rtl92se_interrupt_recognized()
1580 rtl_write_dword(rtlpriv, ISR, *p_inta); in rtl92se_interrupt_recognized()
1582 *p_intb = rtl_read_dword(rtlpriv, ISR + 4) & rtlpci->irq_mask[1]; in rtl92se_interrupt_recognized()
1583 rtl_write_dword(rtlpriv, ISR + 4, *p_intb); in rtl92se_interrupt_recognized()
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| /drivers/net/wireless/intel/ipw2x00/ |
| D | Kconfig | 150 debug option enables debug on hot paths (e.g Tx, Rx, ISR) and
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| /drivers/char/pcmcia/ |
| D | synclink_cs.c | 280 #define ISR 0x3a macro
1186 isr = read_reg16(info, CHB + ISR); in mgslpc_isr()
1194 isr = read_reg16(info, CHA + ISR); in mgslpc_isr()
3248 read_reg16(info, CHA + ISR); /* clear pending IRQs */ in hdlc_mode()
3566 read_reg16(info, CHA + ISR); /* clear pending IRQs */ in async_mode()
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| /drivers/net/ethernet/natsemi/ |
| D | ns83820.c | 326 #define ISR 0x10 macro
1410 isr = readl(dev->base + ISR);
1581 isr = readl(dev->base + ISR);
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| /drivers/gpu/drm/i915/ |
| D | intel_overlay.c | 455 if (I915_READ(ISR) & I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT) { in intel_overlay_release_old_vid()
1541 error->isr = I915_READ(ISR); in intel_overlay_capture_error_state()
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| /drivers/gpu/drm/gma500/ |
| D | psb_intel_reg.h | 798 #define ISR 0x020ac macro
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