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Searched refs:MEMSWCTL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_pm.c4706 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_set_drps()
4714 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
4715 POSTING_READ16(MEMSWCTL); in ironlake_set_drps()
4718 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
4777 if (wait_for_atomic((I915_READ(MEMSWCTL) & MEMCTL_CMD_STS) == 0, 10)) in ironlake_enable_drps()
4798 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_disable_drps()
4811 I915_WRITE(MEMSWCTL, rgvswctl); in ironlake_disable_drps()
Di915_debugfs.c1087 u16 rgvswctl = I915_READ16(MEMSWCTL); in i915_frequency_info()
Di915_reg.h2789 #define MEMSWCTL _MMIO(0x11170) /* Ironlake only */ macro