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Searched refs:NUM_CLIP_SEQ (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770d.h484 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
Dnid.h359 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
Dsid.h1084 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
Dcikd.h1147 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
Drv770.c1598 NUM_CLIP_SEQ(3))); in rv770_gpu_init()
Devergreend.h979 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
Dr600d.h376 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
Dni.c1251 WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); in cayman_gpu_init()
Dr600.c2381 NUM_CLIP_SEQ(3))); in r600_gpu_init()
Devergreen.c3796 WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); in evergreen_gpu_init()
Dsi.c3346 WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); in si_gpu_init()
Dcik.c3442 WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); in cik_gpu_init()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1083 #define NUM_CLIP_SEQ(x) ((x) << 1) macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c1366 WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3)); in gfx_v6_0_gpu_init()