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Searched refs:P1 (Results 1 – 15 of 15) sorted by relevance

/drivers/block/paride/
Don26.c40 #define P1 w2(5);w2(0xd);w2(5);w2(0xd);w2(5);w2(4); macro
55 case 0: w0(1); P1; w0(r); P2; w0(0); P1; in on26_read_regr()
61 case 1: w0(1); P1; w0(r); P2; w0(0); P1; in on26_read_regr()
85 case 1: w0(1); P1; w0(r); P2; w0(0); P1; in on26_write_regr()
112 w0(2); P1; w0(8); P2; in on26_connect()
113 w0(2); P1; w0(x); P2; in on26_connect()
119 else { w0(4); P1; w0(4); P1; } in on26_disconnect()
152 w0(2); P1; w0(0); P2; in on26_test_port()
153 w0(3); P1; w0(0); P2; in on26_test_port()
154 w0(2); P1; w0(8); P2; udelay(100); in on26_test_port()
[all …]
Ddstr.c37 #define P1 w2(5);w2(0xd);w2(5);w2(4); macro
53 w0(0x81); P1; in dstr_read_regr()
55 P2; w0(r); P1; in dstr_read_regr()
80 w0(0x81); P1; in dstr_write_regr()
82 P2; w0(r); P1; in dstr_write_regr()
119 w0(0x81); P1; in dstr_read_block()
121 P2; w0(0x82); P1; P3; w0(0x20); P1; in dstr_read_block()
161 w0(0x81); P1; in dstr_write_block()
163 P2; w0(0x82); P1; P3; w0(0x20); P1; in dstr_write_block()
Dcomm.c36 #define P1 w2(5);w2(0xd);w2(0xd);w2(5);w2(4); macro
53 case 0: w0(r); P1; w0(0); in comm_read_regr()
57 case 1: w0(r+0x20); P1; in comm_read_regr()
80 case 1: w0(r); P1; w0(val); P2; in comm_write_regr()
114 case 0: w0(0x48); P1; in comm_read_block()
122 case 1: w0(0x68); P1; w0(0); in comm_read_block()
156 case 1: w0(0x68); P1; in comm_write_block()
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv50.c380 int N, M, P1, P2; in nv50_clk_calc() local
399 freq = calc_div(core, vdec, &P1); in nv50_clk_calc()
412 divsv |= P1 << 8; in nv50_clk_calc()
433 calc_div(freq, dom6, &P1); in nv50_clk_calc()
436 divsv |= P1; in nv50_clk_calc()
459 freq = calc_pll(clk, 0x4028, core, &N, &M, &P1); in nv50_clk_calc()
464 0x80000000 | (P1 << 19) | (P1 << 16)); in nv50_clk_calc()
473 if (P1-- && shader == (core << 1)) { in nv50_clk_calc()
474 clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16)); in nv50_clk_calc()
477 freq = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in nv50_clk_calc()
[all …]
Dmcp77.c211 int N, M, P1, P2 = 0; in mcp77_clk_calc() local
219 clock = calc_pll(clk, 0x4028, (core << 1), &N, &M, &P1); in mcp77_clk_calc()
228 if(P1 > 2) { in mcp77_clk_calc()
229 P2 = P1 - 2; in mcp77_clk_calc()
230 P1 = 2; in mcp77_clk_calc()
237 clk->cpost = (1 << P1) << 16; in mcp77_clk_calc()
245 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
257 clk->sctrl = P1 << 16; in mcp77_clk_calc()
263 clock = calc_P(500000, vdec, &P1); in mcp77_clk_calc()
269 clk->vdiv = P1 << 16; in mcp77_clk_calc()
/drivers/ata/
Data_piix.c123 P1 = 1, /* port 1 */ enumerator
360 { P0, NA, P1, NA }, /* 000b */
361 { P1, NA, P0, NA }, /* 001b */
364 { P0, P1, IDE, IDE }, /* 100b */
365 { P1, P0, IDE, IDE }, /* 101b */
366 { IDE, IDE, P0, P1 }, /* 110b */
367 { IDE, IDE, P1, P0 }, /* 111b */
376 { P0, P2, P1, P3 }, /* 00b */
377 { IDE, IDE, P1, P3 }, /* 01b */
394 { IDE, IDE, P1, P3 }, /* 01b */
[all …]
/drivers/video/logo/
Dlogo_superh_mono.pbm1 P1
Dlogo_linux_mono.pbm1 P1
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgk104.c133 int N1, fN1, M1, P1; member
161 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in r1373f4_init()
699 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in gk104_ram_calc_sddr3()
981 int *N1, int *fN1, int *M1, int *P1, in gk104_pll_calc_hiclk() argument
1008 *P1 = p_ref; in gk104_pll_calc_hiclk()
1020 *P1 = p_ref; in gk104_pll_calc_hiclk()
1027 *fN1 = (u16)((((best_err / *N2 * *P2) * (*P1 * *M1)) << 13) / crystal); in gk104_pll_calc_hiclk()
1031 return gk104_calc_pll_output(*fN1, 1, *N1, *P1, crystal); in gk104_pll_calc_hiclk()
1060 &ram->N1, &ram->fN1, &ram->M1, &ram->P1, in gk104_ram_calc_xits()
1072 &ram->fN1, &ram->M1, &ram->P1); in gk104_ram_calc_xits()
/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g5.c310 #define P1 85 macro
312 SS_PIN_DECL(P1, GPIOK5, SDA7);
314 FUNC_GROUP_DECL(I2C7, N1, P1);
710 ASPEED_PINCTRL_PIN(P1),
/drivers/net/fddi/skfp/h/
Dskfbi.h899 #define P1(a) (0x0380|((a)<<2)) /* PLC1 (r/w) (DAS) */ macro
956 #define P1_A(a) ADDR(P1(a)) /* PLC1 (r/w) */
/drivers/net/wireless/marvell/libertas/
Dhost.h878 int8_t P1; member
890 int8_t P1; member
Dcmd.c1552 cmd.P1 = p1; in lbs_set_tpc_cfg()
1583 cmd.P1 = p1; in lbs_set_power_adapt_cfg()
/drivers/iio/pressure/
Dbmp280-core.c103 enum { P1, P2, P3, P4, P5, P6, P7, P8, P9 }; enumerator
256 var1 = ((((s64)1) << 47) + var1) * ((s64)le16_to_cpu(buf[P1])) >> 33; in bmp280_compensate_press()
/drivers/scsi/aic7xxx/
Daic79xx.seq1855 * data-valid before the required 100ns P1 setup time (8 P1