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Searched refs:PACKET3_EVENT_WRITE (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dvid.h225 #define PACKET3_EVENT_WRITE 0x46 macro
Dcikd.h338 #define PACKET3_EVENT_WRITE 0x46 macro
Dgfx_v8_0.c1647 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1673 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1699 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
/drivers/gpu/drm/radeon/
Dnid.h1238 #define PACKET3_EVENT_WRITE 0x46 macro
Dsid.h1748 #define PACKET3_EVENT_WRITE 0x46 macro
Dcikd.h1814 #define PACKET3_EVENT_WRITE 0x46 macro
Devergreen_cs.c2234 case PACKET3_EVENT_WRITE: in evergreen_packet3_check()
3392 case PACKET3_EVENT_WRITE: in evergreen_vm_packet3_check()
Devergreend.h1653 #define PACKET3_EVENT_WRITE 0x46 macro
Dr600d.h1663 #define PACKET3_EVENT_WRITE 0x46 macro
Dr600_cs.c1865 case PACKET3_EVENT_WRITE: in r600_packet3_check()
Dsi.c4565 case PACKET3_EVENT_WRITE: in si_vm_packet3_gfx_check()
4668 case PACKET3_EVENT_WRITE: in si_vm_packet3_compute_check()
Dr600.c2899 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); in r600_fence_ring_emit()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1811 #define PACKET3_EVENT_WRITE 0x46 macro