Searched refs:PHY_CFG_PLL_III (Results 1 – 2 of 2) sorted by relevance
/drivers/gpu/drm/hisilicon/kirin/ | ||
D | dw_dsi_reg.h | 45 #define PHY_CFG_PLL_III 0x65 macro |
D | dw_drm_dsi.c | 415 dsi_phy_tst_set(base, PHY_CFG_PLL_III, phy->pll_fbd_s); in dsi_set_mipi_phy() |