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Searched refs:PIPESRC (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_display.c3711 I915_WRITE(PIPESRC(crtc->pipe), in intel_update_pipe_config()
8315 I915_WRITE(PIPESRC(pipe), in intel_set_pipe_src_size()
8362 tmp = I915_READ(PIPESRC(crtc->pipe)); in intel_get_pipe_src_size()
8749 val = I915_READ(PIPESRC(pipe)); in i9xx_get_initial_plane_config()
9888 val = I915_READ(PIPESRC(pipe)); in ironlake_get_initial_plane_config()
11823 pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; in intel_gen4_queue_flip()
11859 pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff; in intel_gen6_queue_flip()
17232 error->pipe[i].source = I915_READ(PIPESRC(i)); in intel_display_capture_error_state()
Di915_reg.h3208 #define PIPESRC(trans) _MMIO_TRANS2(trans, _PIPEASRC) macro