Home
last modified time | relevance | path

Searched refs:RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgmc_v8_0.c569 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, value); in gmc_v8_0_set_fault_enable_default()
660 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v8_0_gart_enable()
690 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v8_0_gart_enable()
Dgmc_v6_0.c414 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT)); in gmc_v6_0_gart_enable()
444 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | in gmc_v6_0_gart_enable()
Dgmc_v7_0.c462 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, value); in gmc_v7_0_set_fault_enable_default()
535 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v7_0_gart_enable()
/drivers/gpu/drm/radeon/
Drv770d.h637 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro
Dnid.h131 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro
Dni.c1316 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT); in cayman_pcie_gart_enable()
1342 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | in cayman_pcie_gart_enable()
Dsid.h396 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro
Dcikd.h516 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro
Drv770.c929 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT); in rv770_pcie_gart_enable()
Devergreend.h1139 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro
Dr600d.h576 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro
Dsi.c4315 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT)); in si_pcie_gart_enable()
4345 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | in si_pcie_gart_enable()
Dcik.c5513 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT)); in cik_pcie_gart_enable()
5539 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT | in cik_pcie_gart_enable()
Dr600.c1167 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT); in r600_pcie_gart_enable()
Devergreen.c2544 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT); in evergreen_pcie_gart_enable()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h398 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4) macro