Searched refs:REG_HDMI_PHY_QSERDES_COM_LOCK_CMP1_MODE0 (Results 1 – 2 of 2) sorted by relevance
491 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP1_MODE0, in hdmi_8996_pll_set_clk_rate()658 cmp1 = hdmi_pll_read(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP1_MODE0); in hdmi_8996_pll_recalc_rate()
985 #define REG_HDMI_PHY_QSERDES_COM_LOCK_CMP1_MODE0 0x0000004c macro