Searched refs:RING_PP_DIR_DCLV (Results 1 – 3 of 3) sorted by relevance
1672 intel_ring_emit_reg(ring, RING_PP_DIR_DCLV(engine)); in hsw_mm_switch()1699 intel_ring_emit_reg(ring, RING_PP_DIR_DCLV(engine)); in gen7_mm_switch()1722 I915_WRITE(RING_PP_DIR_DCLV(engine), PP_DIR_DCLV_2G); in gen6_mm_switch()
2240 I915_READ(RING_PP_DIR_DCLV(engine))); in gen6_ppgtt_info()
191 #define RING_PP_DIR_DCLV(engine) _MMIO((engine)->mmio_base+0x220) macro