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Searched refs:RK2928_CLKSEL_CON (Results 1 – 4 of 4) sorted by relevance

/drivers/clk/rockchip/
Dclk-rk3188.c118 .reg = RK2928_CLKSEL_CON(0), \
124 .reg = RK2928_CLKSEL_CON(1), \
155 .core_reg = RK2928_CLKSEL_CON(0),
169 .reg = RK2928_CLKSEL_CON(1), \
194 .core_reg = RK2928_CLKSEL_CON(0),
258 RK2928_CLKSEL_CON(22), 4, 2, MFLAGS);
262 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS);
266 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
270 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
274 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
[all …]
Dclk-rk3228.c91 .reg = RK2928_CLKSEL_CON(1), \
111 .core_reg = RK2928_CLKSEL_CON(0),
175 RK2928_CLKSEL_CON(9), 8, 2, MFLAGS);
179 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
183 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS);
187 RK2928_CLKSEL_CON(6), 8, 2, MFLAGS);
191 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
195 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
199 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
207 RK2928_CLKSEL_CON(4), 8, 5, DFLAGS),
[all …]
Dclk-rk3036.c93 .reg = RK2928_CLKSEL_CON(1), \
113 .core_reg = RK2928_CLKSEL_CON(0),
157 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS);
161 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS);
165 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS);
169 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS);
173 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS);
194 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
198 RK2928_CLKSEL_CON(1), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY,
201 RK2928_CLKSEL_CON(1), 4, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
[all …]
Dclk.h39 #define RK2928_CLKSEL_CON(x) ((x) * 0x4 + 0x44) macro