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Searched refs:SPI_CONFIG_CNTL (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770.c1310 WREG32(SPI_CONFIG_CNTL, DISABLE_INTERP_1); in rv770_gpu_init()
1312 WREG32(SPI_CONFIG_CNTL, 0); in rv770_gpu_init()
Drv770d.h523 #define SPI_CONFIG_CNTL 0x9100 macro
Dnid.h408 #define SPI_CONFIG_CNTL 0x9100 macro
Dsid.h1131 #define SPI_CONFIG_CNTL 0x9100 macro
Dcikd.h1188 #define SPI_CONFIG_CNTL 0x9100 macro
Devergreend.h1020 #define SPI_CONFIG_CNTL 0x9100 macro
Dr600d.h444 #define SPI_CONFIG_CNTL 0x9100 macro
Devergreen_cs.c3268 case SPI_CONFIG_CNTL: in evergreen_vm_reg_valid()
Dcik.c3393 tmp = RREG32(SPI_CONFIG_CNTL); in cik_gpu_init()
3395 WREG32(SPI_CONFIG_CNTL, tmp); in cik_gpu_init()
Dr600.c2176 WREG32(SPI_CONFIG_CNTL, GPR_WRITE_PRIORITY(0)); in r600_gpu_init()
Devergreen.c3653 WREG32(SPI_CONFIG_CNTL, 0); in evergreen_gpu_init()
Dsi.c4438 case SPI_CONFIG_CNTL: in si_vm_reg_valid()
/drivers/gpu/drm/radeon/reg_srcs/
Devergreen51 0x00009100 SPI_CONFIG_CNTL
Dcayman38 0x00009100 SPI_CONFIG_CNTL
Dr600388 0x00009100 SPI_CONFIG_CNTL
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1130 #define SPI_CONFIG_CNTL 0x2440 macro