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Searched refs:SSPP_DMA1 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5_cfg.c37 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
107 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
178 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
317 [SSPP_DMA0] = 10, [SSPP_DMA1] = 13,
Dmdp5_ctl.c326 case SSPP_DMA1: return MDP5_CTL_LAYER_REG_DMA1(stage); in mdp_ctl_blend_mask()
347 case SSPP_DMA1: return MDP5_CTL_LAYER_EXT_REG_DMA1_BIT3; in mdp_ctl_blend_ext_mask()
422 case SSPP_DMA1: return MDP5_CTL_FLUSH_DMA1; in mdp_ctl_flush_mask_pipe()
Dmdp5_kms.c331 SSPP_DMA0, SSPP_DMA1, in modeset_init() enumerator
Dmdp5.xml.h67 SSPP_DMA1 = 7, enumerator
534 case SSPP_DMA1: return (mdp5_cfg->pipe_dma.base[1]); in __offset_PIPE()