Searched refs:SW_RST (Results 1 – 4 of 4) sorted by relevance
| /drivers/thermal/qcom/ |
| D | tsens-8960.c | 37 #define SW_RST BIT(1) macro
99 ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); in resume_8960()
134 ret = regmap_write(tmdev->map, CNTL_ADDR, reg | SW_RST); in enable_8960()
195 reg_cntl = SW_RST; in init_8960()
196 ret = regmap_update_bits(tmdev->map, CNTL_ADDR, SW_RST, reg_cntl); in init_8960()
202 reg_cntl &= ~SW_RST; in init_8960()
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| /drivers/net/dsa/b53/ |
| D | b53_regs.h | 145 #define SW_RST BIT(7) macro
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| /drivers/net/ethernet/moxa/ |
| D | moxart_ether.h | 185 #define SW_RST BIT(2) /* software reset, last 64 AHB clocks */ macro
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| D | moxart_ether.c | 99 writel(SW_RST, priv->base + REG_MAC_CTRL); in moxart_mac_reset()
100 while (readl(priv->base + REG_MAC_CTRL) & SW_RST) in moxart_mac_reset()
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