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Searched refs:UPLL_BYPASS_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770.c84 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in rv770_set_uvd_clocks()
115 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in rv770_set_uvd_clocks()
Drv770d.h45 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
Dsid.h130 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
Devergreen.c1196 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in evergreen_set_uvd_clocks()
1257 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in evergreen_set_uvd_clocks()
Devergreend.h351 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
Dr600d.h1559 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
Dsi.c7425 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in si_set_uvd_clocks()
7487 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in si_set_uvd_clocks()
Dr600.c208 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~( in r600_set_uvd_clocks()
271 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in r600_set_uvd_clocks()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h132 # define UPLL_BYPASS_EN_MASK 0x00000004 macro