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Searched refs:UPLL_REF_DIV_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770d.h48 # define UPLL_REF_DIV_MASK 0x003F0000 macro
Dsid.h133 # define UPLL_REF_DIV_MASK 0x003F0000 macro
Drv770.c95 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_REF_DIV(1), ~UPLL_REF_DIV_MASK); in rv770_set_uvd_clocks()
Devergreend.h353 # define UPLL_REF_DIV_MASK 0x003F0000 macro
Dr600d.h1564 # define UPLL_REF_DIV_MASK 0x003F0000 macro
Dr600.c253 ~(UPLL_FB_DIV_MASK | UPLL_REF_DIV_MASK)); in r600_set_uvd_clocks()
Devergreen.c1236 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_REF_DIV_MASK); in evergreen_set_uvd_clocks()
Dsi.c7466 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_REF_DIV_MASK); in si_set_uvd_clocks()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h135 # define UPLL_REF_DIV_MASK 0x003F0000 macro