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Searched refs:VC4_GET_FIELD (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/vc4/
Dvc4_v3d.c132 uint32_t nslc = VC4_GET_FIELD(ident1, V3D_IDENT1_NSLC); in vc4_v3d_debugfs_ident()
133 uint32_t tups = VC4_GET_FIELD(ident1, V3D_IDENT1_TUPS); in vc4_v3d_debugfs_ident()
134 uint32_t qups = VC4_GET_FIELD(ident1, V3D_IDENT1_QUPS); in vc4_v3d_debugfs_ident()
137 VC4_GET_FIELD(ident1, V3D_IDENT1_REV)); in vc4_v3d_debugfs_ident()
142 VC4_GET_FIELD(ident1, V3D_IDENT1_NSEM)); in vc4_v3d_debugfs_ident()
Dvc4_validate.c572 uint32_t miplevels = VC4_GET_FIELD(p0, VC4_TEX_P0_MIPLVLS); in reloc_tex()
573 uint32_t width = VC4_GET_FIELD(p1, VC4_TEX_P1_WIDTH); in reloc_tex()
574 uint32_t height = VC4_GET_FIELD(p1, VC4_TEX_P1_HEIGHT); in reloc_tex()
606 if (VC4_GET_FIELD(p2, VC4_TEX_P2_PTYPE) == in reloc_tex()
609 if (VC4_GET_FIELD(p3, VC4_TEX_P2_PTYPE) == in reloc_tex()
624 type = (VC4_GET_FIELD(p0, VC4_TEX_P0_TYPE) | in reloc_tex()
625 (VC4_GET_FIELD(p1, VC4_TEX_P1_TYPE4) << 4)); in reloc_tex()
Dvc4_render_cl.c427 uint8_t tiling = VC4_GET_FIELD(surf->bits, in vc4_rcl_surface_setup()
429 uint8_t buffer = VC4_GET_FIELD(surf->bits, in vc4_rcl_surface_setup()
431 uint8_t format = VC4_GET_FIELD(surf->bits, in vc4_rcl_surface_setup()
526 uint8_t tiling = VC4_GET_FIELD(surf->bits, in vc4_rcl_render_config_surface_setup()
528 uint8_t format = VC4_GET_FIELD(surf->bits, in vc4_rcl_render_config_surface_setup()
Dvc4_crtc.c184 *vpos = VC4_GET_FIELD(val, SCALER_DISPSTATX_LINE); in vc4_crtc_get_scanoutpos()
191 if (VC4_GET_FIELD(val, SCALER_DISPSTATX_FRAME_COUNT) % 2) in vc4_crtc_get_scanoutpos()
518 WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)), in vc4_crtc_disable()
941 u32 top = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_TOP) & ~3; in vc4_crtc_get_cob_allocation()
942 u32 base = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_BASE) & ~3; in vc4_crtc_get_cob_allocation()
Dvc4_regs.h23 #define VC4_GET_FIELD(word, field) (((word) & field##_MASK) >> \ macro