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Searched refs:VC_AND_TC (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770d.h617 #define VC_AND_TC 2 macro
Dnid.h334 #define VC_AND_TC 2 macro
Dsid.h1054 #define VC_AND_TC 2 macro
Dcikd.h1131 #define VC_AND_TC 2 macro
Drv770.c1540 WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(VC_AND_TC) | in rv770_gpu_init()
Devergreend.h1123 #define VC_AND_TC 2 macro
Dr600d.h534 #define VC_AND_TC 2 macro
Dni.c1229 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in cayman_gpu_init()
Dr600.c2288 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); in r600_gpu_init()
Devergreen.c3747 vgt_cache_invalidation = CACHE_INVALIDATION(VC_AND_TC); in evergreen_gpu_init()
Dsi.c3324 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in si_gpu_init()
Dcik.c3429 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in cik_gpu_init()
/drivers/gpu/drm/amd/include/asic_reg/si/
Dsid.h1053 #define VC_AND_TC 2 macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c1348 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) | in gfx_v6_0_gpu_init()
Dgfx_v7_0.c1977 (VC_AND_TC << VGT_CACHE_INVALIDATION__CACHE_INVALIDATION__SHIFT) | in gfx_v7_0_gpu_init()
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_enum.h4917 VC_AND_TC = 0x2, enumerator
Dgfx_8_1_enum.h5472 VC_AND_TC = 0x2, enumerator
Dgfx_8_0_enum.h5403 VC_AND_TC = 0x2, enumerator