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Searched refs:VID_VSA_LINES (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/hisilicon/kirin/
Ddw_dsi_reg.h53 #define VID_VSA_LINES 0x54 /* Vertical Sync Active period */ macro
Ddw_drm_dsi.c498 writel(vsw, base + VID_VSA_LINES); in dsi_set_mode_timing()