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Searched refs:_DPLL1_CFGCR2 (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/i915/
Di915_reg.h7675 #define _DPLL1_CFGCR2 0x6C044 macro
7696 #define DPLL_CFGCR2(id) _MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR2, _DPLL2_CFGCR2)