Home
last modified time | relevance | path

Searched refs:_addr (Results 1 – 25 of 26) sorted by relevance

12

/drivers/staging/iio/meter/
Dmeter.h8 #define IIO_DEV_ATTR_CURRENT_A_OFFSET(_mode, _show, _store, _addr) \ argument
9 IIO_DEVICE_ATTR(current_a_offset, _mode, _show, _store, _addr)
11 #define IIO_DEV_ATTR_CURRENT_B_OFFSET(_mode, _show, _store, _addr) \ argument
12 IIO_DEVICE_ATTR(current_b_offset, _mode, _show, _store, _addr)
14 #define IIO_DEV_ATTR_CURRENT_C_OFFSET(_mode, _show, _store, _addr) \ argument
15 IIO_DEVICE_ATTR(current_c_offset, _mode, _show, _store, _addr)
17 #define IIO_DEV_ATTR_VOLT_A_OFFSET(_mode, _show, _store, _addr) \ argument
18 IIO_DEVICE_ATTR(volt_a_offset, _mode, _show, _store, _addr)
20 #define IIO_DEV_ATTR_VOLT_B_OFFSET(_mode, _show, _store, _addr) \ argument
21 IIO_DEVICE_ATTR(volt_b_offset, _mode, _show, _store, _addr)
[all …]
/drivers/staging/iio/frequency/
Ddds.h15 #define IIO_DEV_ATTR_FREQ(_channel, _num, _mode, _show, _store, _addr) \ argument
17 _mode, _show, _store, _addr)
30 #define IIO_DEV_ATTR_FREQSYMBOL(_channel, _mode, _show, _store, _addr) \ argument
32 _mode, _show, _store, _addr)
38 #define IIO_DEV_ATTR_PHASE(_channel, _num, _mode, _show, _store, _addr) \ argument
40 _mode, _show, _store, _addr)
53 #define IIO_DEV_ATTR_PHASESYMBOL(_channel, _mode, _show, _store, _addr) \ argument
55 _mode, _show, _store, _addr)
61 #define IIO_DEV_ATTR_PINCONTROL_EN(_channel, _mode, _show, _store, _addr)\ argument
63 _mode, _show, _store, _addr)
[all …]
/drivers/uwb/
Daddress.c125 const void *_addr, enum uwb_addr_type type) in uwb_rc_addr_set() argument
129 const struct uwb_dev_addr *dev_addr = _addr; in uwb_rc_addr_set()
130 const struct uwb_mac_addr *mac_addr = _addr; in uwb_rc_addr_set()
163 void *_addr, enum uwb_addr_type type) in uwb_rc_addr_get() argument
168 struct uwb_dev_addr *dev_addr = _addr; in uwb_rc_addr_get()
169 struct uwb_mac_addr *mac_addr = _addr; in uwb_rc_addr_get()
243 int __uwb_mac_addr_assigned_check(struct device *dev, void *_addr) in __uwb_mac_addr_assigned_check() argument
246 struct uwb_mac_addr *addr = _addr; in __uwb_mac_addr_assigned_check()
254 int __uwb_dev_addr_assigned_check(struct device *dev, void *_addr) in __uwb_dev_addr_assigned_check() argument
257 struct uwb_dev_addr *addr = _addr; in __uwb_dev_addr_assigned_check()
/drivers/iio/adc/
Dti-ads1015.c91 #define ADS1015_V_CHAN(_chan, _addr) { \ argument
94 .address = _addr, \
99 .scan_index = _addr, \
110 #define ADS1015_V_DIFF_CHAN(_chan, _chan2, _addr) { \ argument
114 .address = _addr, \
120 .scan_index = _addr, \
131 #define ADS1115_V_CHAN(_chan, _addr) { \ argument
134 .address = _addr, \
139 .scan_index = _addr, \
149 #define ADS1115_V_DIFF_CHAN(_chan, _chan2, _addr) { \ argument
[all …]
Dxilinx-xadc-core.c952 #define XADC_CHAN_TEMP(_chan, _scan_index, _addr) { \ argument
956 .address = (_addr), \
973 #define XADC_CHAN_VOLTAGE(_chan, _scan_index, _addr, _ext, _alarm) { \ argument
977 .address = (_addr), \
985 .sign = ((_addr) == XADC_REG_VREFN) ? 's' : 'u', \
/drivers/gpu/drm/nouveau/include/nvkm/core/
Dmemory.h48 u32 _addr = (a), _data = nvkm_ro32((o), _addr); \
49 nvkm_wo32((o), _addr, (_data & ~(m)) | (d)); \
Ddevice.h248 u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \
249 nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v)); \
/drivers/staging/slicoss/
Dslic.h557 #define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \ argument
559 #define SLIC_GET_ADDR_HIGH(_addr) (u32)(((u64)(_addr) >> 32) & \ argument
562 #define SLIC_GET_ADDR_LOW(_addr) (u32)(_addr) argument
563 #define SLIC_GET_ADDR_HIGH(_addr) (u32)0 argument
/drivers/gpu/drm/nouveau/include/nvif/
Dobject.h62 u32 _addr = (b), _data = nvif_rd32(__object, _addr); \
63 nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \
/drivers/iio/pressure/
Dzpa2326_i2c.c41 #define ZPA2326_SA0(_addr) (_addr & BIT(0)) in zpa2326_i2c_hwid() argument
/drivers/net/ethernet/brocade/bna/
Dbna.h37 #define BNA_SET_DMA_ADDR(_addr, _bna_dma_addr) \ argument
40 cpu_to_be64((u64)(_addr)); \
49 #define BNA_GET_DMA_ADDR(_bna_dma_addr, _addr) \ argument
51 (_addr) = ((((u64)ntohl((_bna_dma_addr)->msb))) << 32) \
/drivers/iio/light/
Dcm3323.c55 #define CM3323_COLOR_CHANNEL(_color, _addr) { \ argument
61 .address = _addr, \
Dtcs3414.c62 #define TCS3414_CHANNEL(_color, _si, _addr) { \ argument
69 .address = _addr, \
Dtcs3472.c61 #define TCS3472_CHANNEL(_color, _si, _addr) { \ argument
68 .address = _addr, \
Dltr501.c558 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \ argument
562 .address = (_addr), \
/drivers/iio/accel/
Dmxc4005.c278 #define MXC4005_CHANNEL(_axis, _addr) { \ argument
282 .address = _addr, \
/drivers/usb/gadget/udc/
Dpxa27x_udc.h267 #define PXA_EP_DEF(_idx, _addr, dir, _type, maxpkt, _config, iface, altset) \ argument
272 .dir_in = dir, .addr = _addr, \
/drivers/iio/chemical/
Datlas-ph-sensor.c123 #define ATLAS_EC_CHANNEL(_idx, _addr) \ argument
128 .address = _addr, \
/drivers/power/supply/
Dsbs-battery.c78 #define SBS_DATA(_psp, _addr, _min_value, _max_value) { \ argument
80 .addr = _addr, \
/drivers/parisc/
Dpdc_stable.c115 #define PDCSPATH_ENTRY(_addr, _name) \ argument
118 .addr = _addr, \
/drivers/gpu/drm/i915/
Dintel_lrc.c205 const u64 _addr = i915_page_dir_dma_addr((ppgtt), (n)); \
206 reg_state[CTX_PDP ## n ## _UDW+1] = upper_32_bits(_addr); \
207 reg_state[CTX_PDP ## n ## _LDW+1] = lower_32_bits(_addr); \
/drivers/net/wireless/ath/ath9k/
Dhw.h85 #define REG_READ_MULTI(_ah, _addr, _val, _cnt) \ argument
86 (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt))
/drivers/regulator/
Dab8500.c1798 #define REG_INIT(_id, _bank, _addr, _mask) \ argument
1801 .addr = _addr, \
/drivers/input/misc/
Dims-pcu.c1453 #define IMS_PCU_OFN_BIT_ATTR(_field, _addr, _nr) \ argument
1457 .addr = _addr, \
/drivers/net/ethernet/chelsio/cxgb4vf/
Dcxgb4vf_main.c1153 static int cxgb4vf_set_mac_addr(struct net_device *dev, void *_addr) in cxgb4vf_set_mac_addr() argument
1156 struct sockaddr *addr = _addr; in cxgb4vf_set_mac_addr()

12