| /drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_type.h | 105 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, IDX)]) argument
119 #define IXGBE_I2CCTL(_hw) IXGBE_BY_MAC((_hw), I2CCTL) argument
133 #define IXGBE_EEC(_hw) IXGBE_BY_MAC((_hw), EEC) argument
141 #define IXGBE_FLA(_hw) IXGBE_BY_MAC((_hw), FLA) argument
153 #define IXGBE_GRC(_hw) IXGBE_BY_MAC((_hw), GRC) argument
168 #define IXGBE_I2C_CLK_IN(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_IN) argument
175 #define IXGBE_I2C_CLK_OUT(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OUT) argument
182 #define IXGBE_I2C_DATA_IN(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_IN) argument
189 #define IXGBE_I2C_DATA_OUT(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OUT) argument
196 #define IXGBE_I2C_DATA_OE_N_EN(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OE_N_EN) argument
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| /drivers/clk/qcom/ |
| D | clk-rcg.h | 114 #define to_clk_rcg(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg, clkr) argument
148 #define to_clk_dyn_rcg(_hw) \ argument
149 container_of(to_clk_regmap(_hw), struct clk_dyn_rcg, clkr)
173 #define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr) argument
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| D | clk-regmap.h | 37 #define to_clk_regmap(_hw) container_of(_hw, struct clk_regmap, hw) argument
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| D | clk-branch.h | 53 #define to_clk_branch(_hw) \ argument
54 container_of(to_clk_regmap(_hw), struct clk_branch, clkr)
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| D | clk-pll.h | 67 #define to_clk_pll(_hw) container_of(to_clk_regmap(_hw), struct clk_pll, clkr) argument
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| D | clk-alpha-pll.c | 59 #define to_clk_alpha_pll(_hw) container_of(to_clk_regmap(_hw), \ argument
62 #define to_clk_alpha_pll_postdiv(_hw) container_of(to_clk_regmap(_hw), \ argument
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| /drivers/clk/tegra/ |
| D | clk.h | 36 #define to_clk_sync_source(_hw) \ argument
37 container_of(_hw, struct tegra_clk_sync_source, hw)
77 #define to_clk_frac_div(_hw) container_of(_hw, struct tegra_clk_frac_div, hw) argument
330 #define to_clk_pll(_hw) container_of(_hw, struct tegra_clk_pll, hw) argument
466 #define to_clk_pll_out(_hw) container_of(_hw, struct tegra_clk_pll_out, hw) argument
525 #define to_clk_periph_gate(_hw) \ argument
526 container_of(_hw, struct tegra_clk_periph_gate, hw)
583 #define to_clk_periph(_hw) container_of(_hw, struct tegra_clk_periph, hw) argument
696 #define to_clk_super_mux(_hw) container_of(_hw, struct tegra_clk_super_mux, hw) argument
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| /drivers/clk/meson/ |
| D | clk-mpll.c | 69 #define to_meson_clk_mpll(_hw) container_of(_hw, struct meson_clk_mpll, hw) argument
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| D | clkc.h | 78 #define to_meson_clk_pll(_hw) container_of(_hw, struct meson_clk_pll, hw) argument
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| /drivers/clk/microchip/ |
| D | clk-core.c | 102 #define clkhw_to_pbclk(_hw) container_of(_hw, struct pic32_periph_clk, hw) argument
252 #define clkhw_to_refosc(_hw) container_of(_hw, struct pic32_ref_osc, hw) argument
594 #define clkhw_to_spll(_hw) container_of(_hw, struct pic32_sys_pll, hw) argument
775 #define clkhw_to_sys_clk(_hw) container_of(_hw, struct pic32_sys_clk, hw) argument
965 #define clkhw_to_sosc(_hw) container_of(_hw, struct pic32_sec_osc, hw) argument
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| /drivers/clk/ingenic/ |
| D | cgu.h | 201 #define to_ingenic_clk(_hw) container_of(_hw, struct ingenic_clk, hw) argument
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| /drivers/clk/zte/ |
| D | clk.c | 20 #define to_clk_zx_pll(_hw) container_of(_hw, struct clk_zx_pll, hw) argument
21 #define to_clk_zx_audio(_hw) container_of(_hw, struct clk_zx_audio, hw) argument
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| /drivers/clk/spear/ |
| D | clk-vco-pll.c | 65 #define to_clk_vco(_hw) container_of(_hw, struct clk_vco, hw) argument
66 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
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| /drivers/clk/uniphier/ |
| D | clk-uniphier-gate.c | 29 #define to_uniphier_clk_gate(_hw) \ argument
30 container_of(_hw, struct uniphier_clk_gate, hw)
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| D | clk-uniphier-mux.c | 30 #define to_uniphier_clk_mux(_hw) container_of(_hw, struct uniphier_clk_mux, hw) argument
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| /drivers/clk/mxs/ |
| D | clk-pll.c | 36 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
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| D | clk-ref.c | 35 #define to_clk_ref(_hw) container_of(_hw, struct clk_ref, hw) argument
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| /drivers/clk/rockchip/ |
| D | clk-inverter.c | 30 #define to_inv_clock(_hw) container_of(_hw, struct rockchip_inv_clock, hw) argument
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| D | clk-mmc-phase.c | 30 #define to_mmc_clock(_hw) container_of(_hw, struct rockchip_mmc_clock, hw) argument
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| /drivers/clk/st/ |
| D | clk-flexgen.c | 42 #define to_flexgen(_hw) container_of(_hw, struct flexgen, hw) argument
43 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) argument
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| /drivers/clk/pxa/ |
| D | clk-pxa.c | 37 #define to_pxa_clk(_hw) container_of(_hw, struct pxa_clk, hw) argument
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| /drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 370 #define to_lpc32xx_clk(_hw) container_of(_hw, struct lpc32xx_clk, hw) argument
371 #define to_lpc32xx_pll_clk(_hw) container_of(_hw, struct lpc32xx_pll_clk, hw) argument
372 #define to_lpc32xx_usb_clk(_hw) container_of(_hw, struct lpc32xx_usb_clk, hw) argument
373 #define to_lpc32xx_mux(_hw) container_of(_hw, struct lpc32xx_clk_mux, hw) argument
374 #define to_lpc32xx_div(_hw) container_of(_hw, struct lpc32xx_clk_div, hw) argument
375 #define to_lpc32xx_gate(_hw) container_of(_hw, struct lpc32xx_clk_gate, hw) argument
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| /drivers/clk/ |
| D | clk-xgene.c | 71 #define to_xgene_clk_pll(_hw) container_of(_hw, struct xgene_clk_pll, hw) argument
248 #define to_xgene_clk_pmd(_hw) container_of(_hw, struct xgene_clk_pmd, hw) argument
459 #define to_xgene_clk(_hw) container_of(_hw, struct xgene_clk, hw) argument
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| /drivers/media/platform/exynos4-is/ |
| D | media-dev.h | 100 #define to_cam_clk(_hw) container_of(_hw, struct cam_clk, hw) argument
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| /drivers/clk/imx/ |
| D | clk-pfd.c | 35 #define to_clk_pfd(_hw) container_of(_hw, struct clk_pfd, hw) argument
|