Home
last modified time | relevance | path

Searched refs:_val (Results 1 – 25 of 41) sorted by relevance

12

/drivers/net/wireless/realtek/rtlwifi/
Dbase.h69 #define SET_80211_HDR_FRAME_CONTROL(_hdr, _val) \ argument
70 WRITEEF2BYTE(_hdr, _val)
71 #define SET_80211_HDR_TYPE_AND_SUBTYPE(_hdr, _val) \ argument
72 WRITEEF1BYTE(_hdr, _val)
73 #define SET_80211_HDR_PWR_MGNT(_hdr, _val) \ argument
74 SET_BITS_TO_LE_2BYTE(_hdr, 12, 1, _val)
75 #define SET_80211_HDR_TO_DS(_hdr, _val) \ argument
76 SET_BITS_TO_LE_2BYTE(_hdr, 8, 1, _val)
78 #define SET_80211_PS_POLL_AID(_hdr, _val) \ argument
79 (*(u16 *)((u8 *)(_hdr) + 2) = _val)
[all …]
Dwifi.h2709 #define EF1BYTE(_val) \ argument
2710 ((u8)(_val))
2711 #define EF2BYTE(_val) \ argument
2712 (le16_to_cpu(_val))
2713 #define EF4BYTE(_val) \ argument
2714 (le32_to_cpu(_val))
2726 #define WRITEEF1BYTE(_ptr, _val) \ argument
2727 (*((u8 *)(_ptr))) = EF1BYTE(_val)
2729 #define WRITEEF2BYTE(_ptr, _val) \ argument
2730 (*((u16 *)(_ptr))) = EF2BYTE(_val)
[all …]
/drivers/net/ethernet/amd/xgbe/
Dxgbe-common.h1076 #define SET_BITS(_var, _index, _width, _val) \ argument
1079 (_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index)); \
1085 #define SET_BITS_LE(_var, _index, _width, _val) \ argument
1088 (_var) |= cpu_to_le32((((_val) & \
1105 #define XGMAC_SET_BITS(_var, _prefix, _field, _val) \ argument
1108 _prefix##_##_field##_WIDTH, (_val))
1115 #define XGMAC_SET_BITS_LE(_var, _prefix, _field, _val) \ argument
1118 _prefix##_##_field##_WIDTH, (_val))
1135 #define XGMAC_IOWRITE(_pdata, _reg, _val) \ argument
1136 iowrite32((_val), (_pdata)->xgmac_regs + _reg)
[all …]
/drivers/video/fbdev/
Dauo_k190x.h82 #define AUOK190X_VERSION_SIZE_INT(_val) ((_val & 0xfc00) >> 10) argument
83 #define AUOK190X_VERSION_SIZE_FLOAT(_val) ((_val & 0x3c0) >> 6) argument
84 #define AUOK190X_VERSION_MODEL(_val) (_val & 0x3f) argument
85 #define AUOK190X_VERSION_LUT(_val) (_val & 0xff) argument
86 #define AUOK190X_VERSION_TCON(_val) ((_val & 0xff00) >> 8) argument
/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h140 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
142 .val = _val, \
150 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
151 _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
153 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
154 _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
157 #define MPP_FUNCTION(_val, _name, _subname) \ argument
158 MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1)
/drivers/staging/rtl8188eu/include/
Dbasic_types.h33 #define EF1BYTE(_val) \ argument
34 ((u8)(_val))
35 #define EF2BYTE(_val) \ argument
36 (le16_to_cpu(_val))
37 #define EF4BYTE(_val) \ argument
38 (le32_to_cpu(_val))
/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dfw.h349 #define FW_CMD_IO_UPDATE(rtlpriv, _val) \ argument
350 rtlpriv->rtlhal.fwcmd_iomap = _val;
352 #define FW_CMD_IO_SET(rtlpriv, _val) \ argument
354 rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val); \
355 FW_CMD_IO_UPDATE(rtlpriv, _val); \
358 #define FW_CMD_PARA_SET(rtlpriv, _val) \ argument
360 rtl_write_dword(rtlpriv, LBUS_ADDR_MASK, _val); \
361 rtlpriv->rtlhal.fwcmd_ioparam = _val; \
/drivers/nvmem/
Dqfprom.c21 unsigned int reg, void *_val, size_t bytes) in qfprom_reg_read() argument
24 u32 *val = _val; in qfprom_reg_read()
34 unsigned int reg, void *_val, size_t bytes) in qfprom_reg_write() argument
37 u32 *val = _val; in qfprom_reg_write()
Dmtk-efuse.c22 unsigned int reg, void *_val, size_t bytes) in mtk_reg_read() argument
25 u32 *val = _val; in mtk_reg_read()
35 unsigned int reg, void *_val, size_t bytes) in mtk_reg_write() argument
38 u32 *val = _val; in mtk_reg_write()
/drivers/pinctrl/sunxi/
Dpinctrl-sunxi.h139 #define SUNXI_FUNCTION(_val, _name) \ argument
142 .muxval = _val, \
145 #define SUNXI_FUNCTION_IRQ(_val, _irq) \ argument
148 .muxval = _val, \
152 #define SUNXI_FUNCTION_IRQ_BANK(_val, _bank, _irq) \ argument
155 .muxval = _val, \
/drivers/media/tuners/
Dmc44s803_priv.h193 #define MC44S803_REG_SM(_val, _reg) \ argument
194 (((_val) << _reg##_S) & (_reg))
197 #define MC44S803_REG_MS(_val, _reg) \ argument
198 (((_val) & (_reg)) >> _reg##_S)
/drivers/net/wireless/intel/iwlwifi/
Diwl-csr.h316 #define CSR_HW_REV_DASH(_val) (((_val) & 0x0000003) >> 0) argument
317 #define CSR_HW_REV_STEP(_val) (((_val) & 0x000000C) >> 2) argument
/drivers/media/i2c/smiapp/
Dsmiapp-quirk.h69 #define SMIAPP_MK_QUIRK_REG_8(_reg, _val) \ argument
72 .val = _val, \
/drivers/net/wireless/ath/
Dhw.c24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
/drivers/i2c/busses/
Di2c-brcmstb.c181 #define __bsc_writel(_val, _reg) iowrite32be(_val, _reg) argument
184 #define __bsc_writel(_val, _reg) iowrite32(_val, _reg) argument
190 #define bsc_writel(_dev, _val, _reg) \ argument
191 __bsc_writel(_val, _dev->base + offsetof(struct bsc_regs, _reg))
/drivers/scsi/cxlflash/
Dsuperpipe.h90 #define DECODE_CTXID(_val) (_val & 0xFFFFFFFF) argument
/drivers/gpu/drm/gma500/
Dpsb_drv.h904 #define PSB_WVDC32(_val, _offs) iowrite32(_val, dev_priv->vdc_reg + (_offs)) argument
922 #define PSB_WSGX32(_val, _offs) iowrite32(_val, dev_priv->sgx_reg + (_offs)) argument
926 #define PSB_WMSVDX32(_val, _offs) iowrite32(_val, dev_priv->msvdx_reg + (_offs)) argument
Dframebuffer.c53 #define CMAP_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16) argument
/drivers/media/pci/ddbridge/
Dddbridge.h175 #define ddbwritel(_val, _adr) writel((_val), \ argument
/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.h61 #define MTK_FUNCTION(_val, _name) \ argument
63 .muxval = _val, \
/drivers/net/wireless/ath/ath5k/
Dath5k.h112 #define AR5K_REG_SM(_val, _flags) \ argument
113 (((_val) << _flags##_S) & (_flags))
116 #define AR5K_REG_MS(_val, _flags) \ argument
117 (((_val) & (_flags)) >> _flags##_S)
124 #define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val) \ argument
126 (((_val) << _flags##_S) & (_flags)), _reg)
/drivers/soc/sunxi/
Dsunxi_sram.c42 #define SUNXI_SRAM_MAP(_val, _func) \ argument
45 .val = _val, \
/drivers/net/wireless/ath/ath9k/
Dhw.h79 #define REG_WRITE(_ah, _reg, _val) \ argument
80 (_ah)->reg_ops.write((_ah), (_val), (_reg))
85 #define REG_READ_MULTI(_ah, _addr, _val, _cnt) \ argument
86 (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt))
115 #define PR_EEP(_s, _val) \ argument
118 _s, (_val)); \
/drivers/net/ethernet/freescale/fman/
Dfman_memac.c101 #define GET_TX_EMPTY_DEFAULT_VALUE(_val) \ argument
103 _val &= ~TX_FIFO_SECTIONS_TX_EMPTY_MASK; \
104 ((_val == TX_FIFO_SECTIONS_TX_AVAIL_10G) ? \
105 (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_10G) :\
106 (_val |= TX_FIFO_SECTIONS_TX_EMPTY_DEFAULT_1G));\
/drivers/net/wireless/mediatek/mt7601u/
Dmt7601u.h301 #define mt76_rmw_field(_dev, _reg, _field, _val) \ argument
302 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))

12