| /drivers/net/wireless/broadcom/b43/ |
| D | phy_lcn.c | 130 b43_phy_maskset(dev, 0x4eb, ~0x7, 0x2); in b43_radio_2064_init()
132 b43_phy_maskset(dev, 0x46a, 0xff00, 0x19); in b43_radio_2064_init()
194 b43_phy_maskset(dev, 0x439, ~0xfff, dac_ctrl); in b43_phy_lcn_set_dac_gain()
245 b43_phy_maskset(dev, 0x634, ~0xff, 0xc); in b43_phy_lcn_rev0_baseband_init()
247 b43_phy_maskset(dev, 0x634, ~0xff, 0xa); in b43_phy_lcn_rev0_baseband_init()
253 b43_phy_maskset(dev, 0x448, ~0x300, 0x100); in b43_phy_lcn_rev0_baseband_init()
254 b43_phy_maskset(dev, 0x608, ~0xff, 0x17); in b43_phy_lcn_rev0_baseband_init()
255 b43_phy_maskset(dev, 0x604, ~0x7ff, 0x3ea); in b43_phy_lcn_rev0_baseband_init()
263 b43_phy_maskset(dev, 0x42f, ~0x7, 0x3); in b43_phy_lcn_bu_tweaks()
264 b43_phy_maskset(dev, 0x030, ~0x7, 0x3); in b43_phy_lcn_bu_tweaks()
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| D | wa.c | 48 b43_phy_maskset(dev, 0x002A, 0x00FF, 0x0400); in b43_wa_initgains()
50 b43_phy_maskset(dev, 0x002A, 0x00FF, 0x1A00); in b43_wa_initgains()
188 b43_phy_maskset(dev, B43_PHY_CRS0, ~0x03C0, 0xD000); in b43_wa_crs_thr()
245 b43_phy_maskset(dev, B43_PHY_CCKSHIFTBITS_WA, 0x00FF, 0x5700); in b43_wa_altagc()
246 b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x007F, 0x000F); in b43_wa_altagc()
247 b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x3F80, 0x2B80); in b43_wa_altagc()
248 b43_phy_maskset(dev, B43_PHY_ANTWRSETT, 0xF0FF, 0x0300); in b43_wa_altagc()
250 b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x000F, 0x0008); in b43_wa_altagc()
251 b43_phy_maskset(dev, B43_PHY_P1P2GAIN, ~0x0F00, 0x0600); in b43_wa_altagc()
252 b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x0F00, 0x0700); in b43_wa_altagc()
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| D | phy_lp.c | 222 b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0x0078); in lpphy_baseband_rev0_1_init()
223 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800); in lpphy_baseband_rev0_1_init()
225 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_0, 0xFFF8, 0x0004); in lpphy_baseband_rev0_1_init()
226 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5400); in lpphy_baseband_rev0_1_init()
227 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2400); in lpphy_baseband_rev0_1_init()
228 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100); in lpphy_baseband_rev0_1_init()
229 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0x0006); in lpphy_baseband_rev0_1_init()
231 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x0005); in lpphy_baseband_rev0_1_init()
232 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0x0180); in lpphy_baseband_rev0_1_init()
233 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3C00); in lpphy_baseband_rev0_1_init()
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| D | phy_g.c | 209 b43_phy_maskset(dev, B43_PHY_DACCTL, 0xFFC3, (baseband_attenuation << 2)); in b43_gphy_set_baseband_attenuation()
211 b43_phy_maskset(dev, B43_PHY_DACCTL, 0xFF87, (baseband_attenuation << 3)); in b43_gphy_set_baseband_attenuation()
334 b43_phy_maskset(dev, 0x04A0, 0xBFBF, tmp); in b43_set_all_gains()
335 b43_phy_maskset(dev, 0x04A1, 0xBFBF, tmp); in b43_set_all_gains()
336 b43_phy_maskset(dev, 0x04A2, 0xBFBF, tmp); in b43_set_all_gains()
367 b43_phy_maskset(dev, 0x04A0, 0xBFBF, 0x4040); in b43_set_original_gains()
368 b43_phy_maskset(dev, 0x04A1, 0xBFBF, 0x4040); in b43_set_original_gains()
369 b43_phy_maskset(dev, 0x04A2, 0xBFBF, 0x4000); in b43_set_original_gains()
446 b43_phy_maskset(dev, 0x0001, 0x3FFF, 0x4000); in b43_calc_nrssi_offset()
448 b43_phy_maskset(dev, 0x0812, 0xFFF3, 0x0004); in b43_calc_nrssi_offset()
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| D | phy_ht.c | 244 b43_phy_maskset(dev, B43_PHY_HT_CLASS_CTL, ~allowed, tmp); in b43_phy_ht_classifier()
688 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C1, in b43_phy_ht_tx_power_ctl_setup()
690 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C2, in b43_phy_ht_tx_power_ctl_setup()
692 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C3, in b43_phy_ht_tx_power_ctl_setup()
698 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI, in b43_phy_ht_tx_power_ctl_setup()
701 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI, in b43_phy_ht_tx_power_ctl_setup()
704 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI2, in b43_phy_ht_tx_power_ctl_setup()
708 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_N, ~B43_PHY_HT_TXPCTL_N_TSSID, in b43_phy_ht_tx_power_ctl_setup()
710 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_N, ~B43_PHY_HT_TXPCTL_N_NPTIL2, in b43_phy_ht_tx_power_ctl_setup()
714 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C1, 0x800, 0) in b43_phy_ht_tx_power_ctl_setup()
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| D | phy_n.c | 202 b43_phy_maskset(dev, val_addr, ~e->val_mask, (value << e->val_shift)); in b43_nphy_rf_ctl_override_rev7()
284 b43_phy_maskset(dev, val_addr, in b43_nphy_rf_ctl_override()
316 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask), in b43_nphy_rf_ctl_override()
351 b43_phy_maskset(dev, reg, ~0xC0, value << 6); in b43_nphy_rf_ctl_intc_override_rev7()
364 b43_phy_maskset(dev, reg, ~tmp, val); in b43_nphy_rf_ctl_intc_override_rev7()
377 b43_phy_maskset(dev, reg, ~tmp, val); in b43_nphy_rf_ctl_intc_override_rev7()
390 b43_phy_maskset(dev, reg, ~tmp, val); in b43_nphy_rf_ctl_intc_override_rev7()
428 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1, in b43_nphy_rf_ctl_intc_override()
430 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1, in b43_nphy_rf_ctl_intc_override()
447 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2, in b43_nphy_rf_ctl_intc_override()
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| D | phy_common.h | 336 void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
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| D | phy_common.c | 334 void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set) in b43_phy_maskset() function
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