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Searched refs:bit_mask (Results 1 – 25 of 46) sorted by relevance

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/drivers/net/ethernet/altera/
Daltera_utils.c20 void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_set_bit() argument
23 value |= bit_mask; in tse_set_bit()
27 void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_clear_bit() argument
30 value &= ~bit_mask; in tse_clear_bit()
34 int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_bit_is_set() argument
37 return (value & bit_mask) ? 1 : 0; in tse_bit_is_set()
40 int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) in tse_bit_is_clear() argument
43 return (value & bit_mask) ? 0 : 1; in tse_bit_is_clear()
Daltera_utils.h22 void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);
23 void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);
24 int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask);
25 int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask);
/drivers/net/ethernet/freescale/fman/
Dfman_tgec.c292 u32 bit_mask; in get_exception_flag() local
296 bit_mask = TGEC_IMASK_MDIO_SCAN_EVENT; in get_exception_flag()
299 bit_mask = TGEC_IMASK_MDIO_CMD_CMPL; in get_exception_flag()
302 bit_mask = TGEC_IMASK_REM_FAULT; in get_exception_flag()
305 bit_mask = TGEC_IMASK_LOC_FAULT; in get_exception_flag()
308 bit_mask = TGEC_IMASK_TX_ECC_ER; in get_exception_flag()
311 bit_mask = TGEC_IMASK_TX_FIFO_UNFL; in get_exception_flag()
314 bit_mask = TGEC_IMASK_TX_FIFO_OVFL; in get_exception_flag()
317 bit_mask = TGEC_IMASK_TX_ER; in get_exception_flag()
320 bit_mask = TGEC_IMASK_RX_FIFO_OVFL; in get_exception_flag()
[all …]
Dfman_dtsec.c531 u32 bit_mask = 0x80000000 >> bit_idx; in set_bucket() local
540 iowrite32be(ioread32be(reg) | bit_mask, reg); in set_bucket()
542 iowrite32be(ioread32be(reg) & (~bit_mask), reg); in set_bucket()
600 u32 bit_mask; in get_exception_flag() local
604 bit_mask = DTSEC_IMASK_BREN; in get_exception_flag()
607 bit_mask = DTSEC_IMASK_RXCEN; in get_exception_flag()
610 bit_mask = DTSEC_IMASK_GTSCEN; in get_exception_flag()
613 bit_mask = DTSEC_IMASK_BTEN; in get_exception_flag()
616 bit_mask = DTSEC_IMASK_TXCEN; in get_exception_flag()
619 bit_mask = DTSEC_IMASK_TXEEN; in get_exception_flag()
[all …]
Dfman_memac.c612 u32 bit_mask; in get_exception_flag() local
616 bit_mask = MEMAC_IMASK_TECC_ER; in get_exception_flag()
619 bit_mask = MEMAC_IMASK_RECC_ER; in get_exception_flag()
622 bit_mask = MEMAC_IMASK_TSECC_ER; in get_exception_flag()
625 bit_mask = MEMAC_IMASK_MGI; in get_exception_flag()
628 bit_mask = 0; in get_exception_flag()
632 return bit_mask; in get_exception_flag()
971 u32 bit_mask = 0; in memac_set_exception() local
976 bit_mask = get_exception_flag(exception); in memac_set_exception()
977 if (bit_mask) { in memac_set_exception()
[all …]
Dfman.c1512 u32 bit_mask; in get_exception_flag() local
1516 bit_mask = EX_DMA_BUS_ERROR; in get_exception_flag()
1519 bit_mask = EX_DMA_SINGLE_PORT_ECC; in get_exception_flag()
1522 bit_mask = EX_DMA_READ_ECC; in get_exception_flag()
1525 bit_mask = EX_DMA_SYSTEM_WRITE_ECC; in get_exception_flag()
1528 bit_mask = EX_DMA_FM_WRITE_ECC; in get_exception_flag()
1531 bit_mask = EX_FPM_STALL_ON_TASKS; in get_exception_flag()
1534 bit_mask = EX_FPM_SINGLE_ECC; in get_exception_flag()
1537 bit_mask = EX_FPM_DOUBLE_ECC; in get_exception_flag()
1540 bit_mask = EX_QMI_SINGLE_ECC; in get_exception_flag()
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/drivers/net/wireless/ralink/rt2x00/
Drt2x00reg.h160 u8 bit_mask; member
165 u16 bit_mask; member
170 u32 bit_mask; member
249 *(__reg) &= ~((__field).bit_mask); \
252 ((__field).bit_mask); \
258 ((__reg) & ((__field).bit_mask)) >> \
/drivers/staging/most/hdm-dim2/
Ddim2_hal.c57 static inline u32 bit_mask(u8 position) in bit_mask() function
165 u32 const cmd = bit_mask(MADR_WNR_BIT) | bit_mask(MADR_TB_BIT); in dim2_clear_dbr()
201 dim2_transfer_madr(bit_mask(MADR_WNR_BIT) | ctr_addr); in dim2_write_ctr_mask()
307 bit_mask(ADT1_PS_BIT + shift) | in dim2_start_ctrl_async()
308 bit_mask(ADT1_RDY_BIT + shift) | in dim2_start_ctrl_async()
330 bit_mask(ADT1_RDY_BIT + shift) | in dim2_start_isoc_sync()
362 dimcb_io_read(&g.dim2->ACMR0) | bit_mask(ch_addr)); in dim2_configure_channel()
369 dimcb_io_read(&g.dim2->ACMR0) & ~bit_mask(ch_addr)); in dim2_clear_channel()
378 dimcb_io_write(&g.dim2->ACSR0, bit_mask(ch_addr)); in dim2_clear_channel()
554 dimcb_io_write(&g.dim2->HCTL, bit_mask(HCTL_EN_BIT)); in dim2_initialize()
[all …]
/drivers/hid/
Dhid-prodikeys.c313 u32 bit_mask; in pcmidi_handle_report1() local
315 bit_mask = data[1]; in pcmidi_handle_report1()
316 bit_mask = (bit_mask << 8) | data[2]; in pcmidi_handle_report1()
317 bit_mask = (bit_mask << 8) | data[3]; in pcmidi_handle_report1()
322 if (pm->midi_mode && bit_mask == 0x004000) { in pcmidi_handle_report1()
332 else if (pm->midi_mode && bit_mask == 0x000004) { in pcmidi_handle_report1()
389 u32 bit_mask; in pcmidi_handle_report4() local
392 bit_mask = data[1]; in pcmidi_handle_report4()
393 bit_mask = (bit_mask << 8) | data[2]; in pcmidi_handle_report4()
394 bit_mask = (bit_mask << 8) | data[3]; in pcmidi_handle_report4()
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/drivers/mfd/
Dadp5520.c71 uint8_t bit_mask) in __adp5520_ack_bits() argument
82 reg_val |= bit_mask; in __adp5520_ack_bits()
102 int adp5520_set_bits(struct device *dev, int reg, uint8_t bit_mask) in adp5520_set_bits() argument
112 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp5520_set_bits()
113 reg_val |= bit_mask; in adp5520_set_bits()
122 int adp5520_clr_bits(struct device *dev, int reg, uint8_t bit_mask) in adp5520_clr_bits() argument
132 if (!ret && (reg_val & bit_mask)) { in adp5520_clr_bits()
133 reg_val &= ~bit_mask; in adp5520_clr_bits()
Dda903x.c173 int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask) in da903x_set_bits() argument
185 if ((reg_val & bit_mask) != bit_mask) { in da903x_set_bits()
186 reg_val |= bit_mask; in da903x_set_bits()
195 int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) in da903x_clr_bits() argument
207 if (reg_val & bit_mask) { in da903x_clr_bits()
208 reg_val &= ~bit_mask; in da903x_clr_bits()
Dtwl6030-irq.c244 int twl6030_interrupt_unmask(u8 bit_mask, u8 offset) in twl6030_interrupt_unmask() argument
251 unmask_value &= (~(bit_mask)); in twl6030_interrupt_unmask()
258 int twl6030_interrupt_mask(u8 bit_mask, u8 offset) in twl6030_interrupt_mask() argument
265 mask_value |= (bit_mask); in twl6030_interrupt_mask()
Dtps6586x.c180 int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask) in tps6586x_set_bits() argument
184 return regmap_update_bits(tps6586x->regmap, reg, bit_mask, bit_mask); in tps6586x_set_bits()
188 int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask) in tps6586x_clr_bits() argument
192 return regmap_update_bits(tps6586x->regmap, reg, bit_mask, 0); in tps6586x_clr_bits()
/drivers/clk/bcm/
Dclk-iproc-pll.c172 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; in __pll_disable()
183 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); in __pll_disable()
195 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); in __pll_enable()
202 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; in __pll_enable()
240 val &= ~(bit_mask(dig_filter->ki_width) << dig_filter->ki_shift | in __pll_bring_out_reset()
241 bit_mask(dig_filter->kp_width) << dig_filter->kp_shift | in __pll_bring_out_reset()
242 bit_mask(dig_filter->ka_width) << dig_filter->ka_shift); in __pll_bring_out_reset()
310 val &= ~(bit_mask(ctrl->macro_mode.width) << in pll_set_rate()
333 val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift); in pll_set_rate()
340 val &= ~(bit_mask(ctrl->ndiv_frac.width) << in pll_set_rate()
[all …]
Dclk-iproc-asiu.c99 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
101 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
159 val &= ~(bit_mask(clk->div.high_width) in iproc_asiu_clk_set_rate()
163 val &= ~(bit_mask(clk->div.high_width) in iproc_asiu_clk_set_rate()
167 val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); in iproc_asiu_clk_set_rate()
170 val &= ~(bit_mask(clk->div.low_width) << clk->div.low_shift); in iproc_asiu_clk_set_rate()
/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbtcoutsrc.c508 u32 bit_mask, u8 data) in halbtc_bitmask_write_1byte() argument
515 if (bit_mask != MASKDWORD) {/*if not "double word" write*/ in halbtc_bitmask_write_1byte()
518 if ((bit_mask>>i) & 0x1) in halbtc_bitmask_write_1byte()
522 data = (original_value & (~bit_mask)) | in halbtc_bitmask_write_1byte()
523 ((data << bit_shift) & bit_mask); in halbtc_bitmask_write_1byte()
545 static void halbtc_set_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask, in halbtc_set_bbreg() argument
551 rtl_set_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask, data); in halbtc_set_bbreg()
554 static u32 halbtc_get_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask) in halbtc_get_bbreg() argument
559 return rtl_get_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask); in halbtc_get_bbreg()
563 u32 bit_mask, u32 data) in halbtc_set_rfreg() argument
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Dhalbtcoutsrc.h367 u32 bit_mask, u8 data1b);
374 u8 bit_mask, u8 data);
377 u32 bit_mask, u32 data);
380 u32 bit_mask);
383 u32 bit_mask, u32 data);
386 u32 reg_addr, u32 bit_mask);
/drivers/staging/rtl8188eu/include/
Dphy.h15 u32 reg_addr, u32 bit_mask);
17 u32 reg_addr, u32 bit_mask, u32 data);
/drivers/gpio/
Dgpio-twl4030.c408 u8 bit_mask; in gpio_twl4030_pulls() local
411 for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) { in gpio_twl4030_pulls()
413 bit_mask |= 1 << (j + 1); in gpio_twl4030_pulls()
415 bit_mask |= 1 << (j + 0); in gpio_twl4030_pulls()
417 message[i] = bit_mask; in gpio_twl4030_pulls()
/drivers/video/backlight/
Dadp8860_bl.c139 static int adp8860_set_bits(struct i2c_client *client, int reg, uint8_t bit_mask) in adp8860_set_bits() argument
149 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp8860_set_bits()
150 reg_val |= bit_mask; in adp8860_set_bits()
158 static int adp8860_clr_bits(struct i2c_client *client, int reg, uint8_t bit_mask) in adp8860_clr_bits() argument
168 if (!ret && (reg_val & bit_mask)) { in adp8860_clr_bits()
169 reg_val &= ~bit_mask; in adp8860_clr_bits()
Dadp8870_bl.c154 static int adp8870_set_bits(struct i2c_client *client, int reg, uint8_t bit_mask) in adp8870_set_bits() argument
164 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp8870_set_bits()
165 reg_val |= bit_mask; in adp8870_set_bits()
173 static int adp8870_clr_bits(struct i2c_client *client, int reg, uint8_t bit_mask) in adp8870_clr_bits() argument
183 if (!ret && (reg_val & bit_mask)) { in adp8870_clr_bits()
184 reg_val &= ~bit_mask; in adp8870_clr_bits()
/drivers/video/fbdev/core/
Dsysimgblt.c191 u32 bit_mask, end_mask, eorx, shift; in fast_imageblit() local
217 bit_mask = (1 << ppw) - 1; in fast_imageblit()
228 end_mask = tab[(*src >> shift) & bit_mask]; in fast_imageblit()
Dcfbimgblt.c221 u32 bit_mask, end_mask, eorx, shift; in fast_imageblit() local
247 bit_mask = (1 << ppw) - 1; in fast_imageblit()
256 end_mask = tab[(*src >> shift) & bit_mask]; in fast_imageblit()
/drivers/staging/rtl8192e/rtl8192e/
Drtl_dm.c1210 u32 bit_mask = 0x7f; in _rtl92e_dm_bb_initialgain_restore() local
1216 rtl92e_set_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask, in _rtl92e_dm_bb_initialgain_restore()
1218 rtl92e_set_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask, in _rtl92e_dm_bb_initialgain_restore()
1220 rtl92e_set_bb_reg(dev, rOFDM0_XCAGCCore1, bit_mask, in _rtl92e_dm_bb_initialgain_restore()
1222 rtl92e_set_bb_reg(dev, rOFDM0_XDAGCCore1, bit_mask, in _rtl92e_dm_bb_initialgain_restore()
1224 bit_mask = bMaskByte2; in _rtl92e_dm_bb_initialgain_restore()
1225 rtl92e_set_bb_reg(dev, rCCK0_CCA, bit_mask, in _rtl92e_dm_bb_initialgain_restore()
1245 u32 bit_mask = bMaskByte0; in rtl92e_dm_backup_state() local
1254 priv->initgain_backup.xaagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XAAGCCore1, bit_mask); in rtl92e_dm_backup_state()
1255 priv->initgain_backup.xbagccore1 = (u8)rtl92e_get_bb_reg(dev, rOFDM0_XBAGCCore1, bit_mask); in rtl92e_dm_backup_state()
[all …]
/drivers/net/can/
Dti_hecc.c272 u32 bit_mask) in hecc_set_bit() argument
274 hecc_write(priv, reg, hecc_read(priv, reg) | bit_mask); in hecc_set_bit()
278 u32 bit_mask) in hecc_clear_bit() argument
280 hecc_write(priv, reg, hecc_read(priv, reg) & ~bit_mask); in hecc_clear_bit()
283 static inline u32 hecc_get_bit(struct ti_hecc_priv *priv, int reg, u32 bit_mask) in hecc_get_bit() argument
285 return (hecc_read(priv, reg) & bit_mask) ? 1 : 0; in hecc_get_bit()

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