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Searched refs:chips (Results 1 – 25 of 193) sorted by relevance

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/drivers/gpio/
Dgpio-davinci.c179 struct davinci_gpio_controller *chips = dev_get_drvdata(gc->parent); in davinci_gpio_of_xlate() local
185 if (gc != &chips[gpiospec->args[0] / 32].chip) in davinci_gpio_of_xlate()
199 struct davinci_gpio_controller *chips; in davinci_gpio_probe() local
228 chips = devm_kzalloc(dev, in davinci_gpio_probe()
231 if (!chips) in davinci_gpio_probe()
240 chips[i].chip.label = "DaVinci"; in davinci_gpio_probe()
242 chips[i].chip.direction_input = davinci_direction_in; in davinci_gpio_probe()
243 chips[i].chip.get = davinci_gpio_get; in davinci_gpio_probe()
244 chips[i].chip.direction_output = davinci_direction_out; in davinci_gpio_probe()
245 chips[i].chip.set = davinci_gpio_set; in davinci_gpio_probe()
[all …]
/drivers/mtd/chips/
DKconfig5 tristate "Detect flash chips by Common Flash Interface (CFI) probe"
17 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
21 This option enables JEDEC-style probing of flash chips which are not
23 CFI-targeted flash drivers for any chips which are identified which
25 covers most AMD/Fujitsu-compatible chips and also non-CFI
26 Intel chips.
36 chips, or if you wish to reduce the size of the kernel by including
37 support for only specific arrangements of flash chips, say 'Y'. This
49 data bits when writing the 'magic' commands to the chips. Saying
51 enabled, means that the CPU will not do any swapping; the chips
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Dcfi_cmdset_0002.c643 cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp; in cfi_cmdset_0002()
644 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp; in cfi_cmdset_0002()
645 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp; in cfi_cmdset_0002()
654 cfi->chips[i].buffer_write_time_max = in cfi_cmdset_0002()
658 cfi->chips[i].buffer_write_time_max = 0; in cfi_cmdset_0002()
660 cfi->chips[i].buffer_write_time_max = in cfi_cmdset_0002()
661 max(cfi->chips[i].buffer_write_time_max, 2000); in cfi_cmdset_0002()
663 cfi->chips[i].ref_point_counter = 0; in cfi_cmdset_0002()
664 init_waitqueue_head(&(cfi->chips[i].wq)); in cfi_cmdset_0002()
1158 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf); in cfi_amdstd_read()
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Dcfi_cmdset_0001.c534 cfi->chips[i].word_write_time = in cfi_cmdset_0001()
537 cfi->chips[i].word_write_time = 50000; in cfi_cmdset_0001()
540 cfi->chips[i].buffer_write_time = in cfi_cmdset_0001()
545 cfi->chips[i].erase_time = in cfi_cmdset_0001()
548 cfi->chips[i].erase_time = 2000000; in cfi_cmdset_0001()
552 cfi->chips[i].word_write_time_max = in cfi_cmdset_0001()
556 cfi->chips[i].word_write_time_max = 50000 * 8; in cfi_cmdset_0001()
560 cfi->chips[i].buffer_write_time_max = in cfi_cmdset_0001()
566 cfi->chips[i].erase_time_max = in cfi_cmdset_0001()
570 cfi->chips[i].erase_time_max = 2000000 * 8; in cfi_cmdset_0001()
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Dcfi_cmdset_0020.c155 cfi->chips[i].word_write_time = 128; in cfi_cmdset_0020()
156 cfi->chips[i].buffer_write_time = 128; in cfi_cmdset_0020()
157 cfi->chips[i].erase_time = 1024; in cfi_cmdset_0020()
158 cfi->chips[i].ref_point_counter = 0; in cfi_cmdset_0020()
159 init_waitqueue_head(&(cfi->chips[i].wq)); in cfi_cmdset_0020()
405 ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf); in cfi_staa_read()
632 ret = do_write_buffer(map, &cfi->chips[chipnum], in cfi_staa_write_buffers()
948 ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr); in cfi_staa_erase_varsize()
984 chip = &cfi->chips[i]; in cfi_staa_sync()
1020 chip = &cfi->chips[i]; in cfi_staa_sync()
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/drivers/i2c/muxes/
Di2c-mux-pca954x.c80 static const struct chip_desc chips[] = { variable
125 { .compatible = "nxp,pca9540", .data = &chips[pca_9540] },
126 { .compatible = "nxp,pca9542", .data = &chips[pca_9542] },
127 { .compatible = "nxp,pca9543", .data = &chips[pca_9543] },
128 { .compatible = "nxp,pca9544", .data = &chips[pca_9544] },
129 { .compatible = "nxp,pca9545", .data = &chips[pca_9545] },
130 { .compatible = "nxp,pca9546", .data = &chips[pca_9546] },
131 { .compatible = "nxp,pca9547", .data = &chips[pca_9547] },
132 { .compatible = "nxp,pca9548", .data = &chips[pca_9548] },
252 data->chip = &chips[id->driver_data]; in pca954x_probe()
/drivers/net/wireless/ralink/rt2x00/
DKconfig28 Supported chips: RT2460.
40 Supported chips: RT2560.
55 Supported chips: RT2561, RT2561S & RT2661.
72 Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890, RT3052,
85 Supported chips: RT3390
93 Supported chips: RT3060, RT3062, RT3562, RT3592
102 Supported chips: RT5390
110 Supported chips: RT3290
120 Supported chips: RT2571 & RT2572.
133 Supported chips: RT2571W, RT2573 & RT2671.
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/drivers/cpufreq/
Dpowernv-cpufreq.c123 } *chips; variable
864 chips[i].restore = true; in powernv_cpufreq_occ_msg()
865 schedule_work(&chips[i].throttle); in powernv_cpufreq_occ_msg()
872 if (chips[i].id == omsg.chip) in powernv_cpufreq_occ_msg()
877 chips[i].throttle_reason = omsg.throttle_status; in powernv_cpufreq_occ_msg()
878 chips[i].reason[omsg.throttle_status]++; in powernv_cpufreq_occ_msg()
882 chips[i].restore = true; in powernv_cpufreq_occ_msg()
884 schedule_work(&chips[i].throttle); in powernv_cpufreq_occ_msg()
933 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); in init_chip_info()
934 if (!chips) in init_chip_info()
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/drivers/mtd/lpddr/
DKconfig5 tristate "Support for LPDDR flash chips"
9 flash chips. Synonymous with Mobile-DDR. It is a new standard for
14 tristate "Detect flash chips by QINFO probe"
16 Device Information for LPDDR chips is offered through the Overlay
24 tristate "Support for LPDDR2-NVM flash chips"
Dlpddr_cmds.c89 chip = &lpddr->chips[0]; in lpddr_cmdset()
95 *chip = lpddr->chips[i]; in lpddr_cmdset()
475 struct flchip *chip = &lpddr->chips[chipnum]; in do_erase_oneblock()
503 struct flchip *chip = &lpddr->chips[chipnum]; in lpddr_read()
528 struct flchip *chip = &lpddr->chips[chipnum]; in lpddr_point()
569 chip = &lpddr->chips[chipnum]; in lpddr_point()
588 chip = &lpddr->chips[chipnum]; in lpddr_unpoint()
660 ret = do_write_buffer(map, &lpddr->chips[chipnum], in lpddr_writev()
710 struct flchip *chip = &lpddr->chips[chipnum]; in do_xxlock()
/drivers/mtd/maps/
DKconfig6 bool "Support non-linear mappings of flash chips"
9 paged mappings of flash chips.
16 ROM driver code to communicate with chips which are mapped
18 the physical address and size of the flash chips on your
41 This is the physical memory location at which the flash chips
51 This is the total length of the mapping of the flash chips on
53 physical memory map between the chips, this could be larger
73 and RAM driver code to communicate with chips which are mapped
92 in which user-programmable flash chips are connected on the
115 which user-programmable flash chips are connected on various
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/drivers/hwmon/
DKconfig109 AD7416, AD7417 and AD7418 temperature monitoring chips.
119 and ADM1023 sensor chips and clones: Maxim MAX1617 and MAX1617A,
131 and Philips NE1619 sensor chips.
163 and ADM1030 sensor chips.
174 Dallas DS1780, National Semiconductor LM81 sensor chips.
193 ADT7310 and ADT7320 temperature monitoring chips.
204 ADT7410 and ADT7420 temperature monitoring chips.
224 ADT7462 temperature monitoring chips.
234 ADT7470 temperature monitoring chips.
246 chips.
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/drivers/iio/potentiometer/
DKconfig24 chips.
42 digital potentiometer chips.
56 digital potentiometer chips.
68 digital potentiometer chips.
/drivers/nfc/st-nci/
DKconfig4 STMicroelectronics NFC NCI chips core driver. It implements the chipset
14 STMicroelectronics NFC NCI chips familly.
26 STMicroelectronics NFC NCI chips familly.
/drivers/mtd/devices/
DKconfig57 This enables access to AT45xxx DataFlash chips, using SPI.
58 Sometimes DataFlash chips are packaged inside MMC-format
75 Newer DataFlash chips (revisions C and D) support 128 bytes of
82 tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)"
85 This enables access to most modern SPI flash chips, used for
87 Spansion S25SL, SST 25VF, ST M25P, and Winbond W25X. Other chips
89 or to add other chips.
91 Note that the original DataFlash chips (AT45 series, not AT26DF),
106 tristate "Support SST25L (non JEDEC) SPI Flash chips"
109 This enables access to the non JEDEC SST25L SPI flash chips, used
/drivers/regulator/
DKconfig61 This driver supports Marvell 88PM800 voltage regulator chips.
64 It's suitable to support PXA988 chips to control VCC_MAIN and
71 This driver supports 88PM8607 voltage regulator chips.
94 This driver supports AD5398 and AD5821 current regulator chips.
328 This driver supports LP873X voltage regulator chips. LP873X
378 for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
443 S5PV210, and Exynos-4 chips to control VCC_CORE and
452 and S5PC1XX chips to control VCC_CORE and VCC_USIM voltages.
460 Exynos-4 chips to control VARM and VINT voltages.
469 Exynos-4x12 (MAX77693) or Exynos5433 (MAX77843) SoC chips.
[all …]
/drivers/rtc/
DKconfig155 88PM860x chips.
165 88PM80x chips.
185 clock chips.
205 chips.
214 chips (often with battery backup) connected with I2C. This driver
216 EPSON RX-8025, Intersil ISL12057 and probably other chips. In some
220 The first seven registers on these chips hold an RTC, and other
255 DS1374 real-time clock chips. If an interrupt is associated
267 real-time clock chips.
368 Ricoh R2025S/D, RS5C372A, RS5C372B, RV5C386, and RV5C387A RTC chips.
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/drivers/gpu/drm/mgag200/
DKconfig7 This is a KMS driver for the MGA G200 server chips, it
9 chips. It requires 0.3.0 of the modesetting userspace driver,
/drivers/net/wireless/atmel/
DKconfig23 chips. This driver supports standard Linux wireless extensions.
47 Atmel at76c502 and at76c504 chips.
55 at76c505 or at76c505a chips.
/drivers/mtd/nand/
Dnand_bbt.c527 int i, chips; in search_bbt() local
544 chips = this->numchips; in search_bbt()
548 chips = 1; in search_bbt()
552 for (i = 0; i < chips; i++) { in search_bbt()
576 for (i = 0; i < chips; i++) { in search_bbt()
917 int i, chips, writeops, create, chipsel, res, res2; in check_create() local
925 chips = this->numchips; in check_create()
927 chips = 1; in check_create()
929 for (i = 0; i < chips; i++) { in check_create()
1043 int i, j, chips, block, nrblocks, update; in mark_bbt_region() local
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Djz4780_nand.c49 struct list_head chips; member
300 list_add_tail(&nand->chip_list, &nfc->chips); in jz4780_nand_init_chip()
309 while (!list_empty(&nfc->chips)) { in jz4780_nand_cleanup_chips()
310 chip = list_first_entry(&nfc->chips, struct jz4780_nand_chip, chip_list); in jz4780_nand_cleanup_chips()
372 INIT_LIST_HEAD(&nfc->chips); in jz4780_nand_probe()
DKconfig77 determine the size of certain chips. Set the address of the
191 using NAND. Early versions of the chips have had problems with
320 The CS553x companion chips for the AMD Geode processor
348 chips) NAND controller. This is the default for the PHYTEC 3250
358 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
386 The simulator may simulate various NAND flash chips for the
438 Various Freescale chips, including the 8313, include a NAND Flash
449 Various Freescale chips e.g P1010, include a NAND Flash machine
459 Enables support for NAND Flash chips wired onto Freescale PowerPC
501 Enable the driver for NAND flash chips on Texas Instruments
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/drivers/net/can/cc770/
DKconfig10 This driver adds legacy support for CC770 and AN82527 chips
17 This driver adds support for the CC770 and AN82527 chips
/drivers/net/dsa/mv88e6xxx/
DKconfig8 Ethernet switch chips, except 88E6060.
18 It is required on most chips. If the chip you compile the support for
/drivers/usb/host/
DKconfig10 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
110 Some EHCI chips have vendor-specific extensions to integrate
171 Variation of ARC USB block used in some Freescale chips.
178 Variation of ARC USB block used in some Freescale chips.
181 tristate "EHCI support for OMAP3 and later chips"
187 OMAP3 and later chips.
206 ST SPEAr chips.
223 Atmel chips.
334 USB 2.0 device support. All CN6XXX based chips with USB are
356 The ISP1160 and ISP1161 chips are USB host controllers. Enable this
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