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Searched refs:clkgr (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/ingenic/
Djz4740-cgu.c252 uint32_t clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_disable_auto_suspend() local
254 clkgr &= ~CLKGR_UDC; in jz4740_clock_udc_disable_auto_suspend()
255 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_disable_auto_suspend()
261 uint32_t clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_enable_auto_suspend() local
263 clkgr |= CLKGR_UDC; in jz4740_clock_udc_enable_auto_suspend()
264 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_udc_enable_auto_suspend()
274 uint32_t clkgr, cppcr; in jz4740_clock_suspend() local
276 clkgr = readl(cgu->base + CGU_REG_CLKGR); in jz4740_clock_suspend()
277 clkgr |= JZ_CLOCK_GATE_TCU | JZ_CLOCK_GATE_DMAC | JZ_CLOCK_GATE_UART0; in jz4740_clock_suspend()
278 writel(clkgr, cgu->base + CGU_REG_CLKGR); in jz4740_clock_suspend()
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Dcgu.c63 u32 clkgr = readl(cgu->base + info->reg); in ingenic_cgu_gate_set() local
66 clkgr |= BIT(info->bit); in ingenic_cgu_gate_set()
68 clkgr &= ~BIT(info->bit); in ingenic_cgu_gate_set()
70 writel(clkgr, cgu->base + info->reg); in ingenic_cgu_gate_set()