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Searched refs:clock_info (Results 1 – 25 of 44) sorted by relevance

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/drivers/gpu/drm/radeon/
Dradeon_atombios.c2082 &rdev->pm.power_state[state_index].clock_info[0]; in radeon_atombios_parse_misc_flags_1_3()
2084 rdev->pm.power_state[state_index].clock_info[0].flags |= in radeon_atombios_parse_misc_flags_1_3()
2133 rdev->pm.power_state[state_index].clock_info = in radeon_atombios_parse_power_table_1_3()
2135 if (!rdev->pm.power_state[state_index].clock_info) in radeon_atombios_parse_power_table_1_3()
2138 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; in radeon_atombios_parse_power_table_1_3()
2141 rdev->pm.power_state[state_index].clock_info[0].mclk = in radeon_atombios_parse_power_table_1_3()
2143 rdev->pm.power_state[state_index].clock_info[0].sclk = in radeon_atombios_parse_power_table_1_3()
2146 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_atombios_parse_power_table_1_3()
2147 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_atombios_parse_power_table_1_3()
2154 rdev->pm.power_state[state_index].clock_info[0].voltage.type = in radeon_atombios_parse_power_table_1_3()
[all …]
Dradeon_combios.c2648 rdev->pm.power_state[0].clock_info = in radeon_combios_get_power_modes()
2650 rdev->pm.power_state[1].clock_info = in radeon_combios_get_power_modes()
2652 if (!rdev->pm.power_state[0].clock_info || in radeon_combios_get_power_modes()
2653 !rdev->pm.power_state[1].clock_info) in radeon_combios_get_power_modes()
2731 rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2); in radeon_combios_get_power_modes()
2732 rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6); in radeon_combios_get_power_modes()
2733 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_combios_get_power_modes()
2734 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_combios_get_power_modes()
2744 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO; in radeon_combios_get_power_modes()
2746 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = in radeon_combios_get_power_modes()
[all …]
Drs780_dpm.c749 union pplib_clock_info *clock_info) in rs780_parse_pplib_clock_info() argument
754 sclk = le16_to_cpu(clock_info->rs780.usLowEngineClockLow); in rs780_parse_pplib_clock_info()
755 sclk |= clock_info->rs780.ucLowEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
757 sclk = le16_to_cpu(clock_info->rs780.usHighEngineClockLow); in rs780_parse_pplib_clock_info()
758 sclk |= clock_info->rs780.ucHighEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
760 switch (le16_to_cpu(clock_info->rs780.usVDDC)) { in rs780_parse_pplib_clock_info()
779 ps->flags = le32_to_cpu(clock_info->rs780.ulFlags); in rs780_parse_pplib_clock_info()
795 union pplib_clock_info *clock_info; in rs780_parse_power_table() local
823 clock_info = (union pplib_clock_info *) in rs780_parse_power_table()
839 clock_info); in rs780_parse_power_table()
Drv770_dpm.c2176 union pplib_clock_info *clock_info) in rv7xx_parse_pplib_clock_info() argument
2198 sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2199 sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2200 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in rv7xx_parse_pplib_clock_info()
2201 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2203 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); in rv7xx_parse_pplib_clock_info()
2204 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in rv7xx_parse_pplib_clock_info()
2205 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags); in rv7xx_parse_pplib_clock_info()
2207 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2208 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
[all …]
Dradeon_pm.c178 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
192 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
195 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
320 struct radeon_pm_clock_info *clock_info; in radeon_pm_print_states() local
335 clock_info = &(power_state->clock_info[j]); in radeon_pm_print_states()
339 clock_info->sclk * 10); in radeon_pm_print_states()
343 clock_info->sclk * 10, in radeon_pm_print_states()
344 clock_info->mclk * 10, in radeon_pm_print_states()
345 clock_info->voltage.voltage); in radeon_pm_print_states()
1241 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
[all …]
Dtrinity_dpm.c1708 union pplib_clock_info *clock_info) in trinity_parse_pplib_clock_info() argument
1715 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_pplib_clock_info()
1716 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in trinity_parse_pplib_clock_info()
1718 pl->vddc_index = clock_info->sumo.vddcIndex; in trinity_parse_pplib_clock_info()
1734 union pplib_clock_info *clock_info; in trinity_parse_power_table() local
1771 if (!rdev->pm.power_state[i].clock_info) in trinity_parse_power_table()
1787 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1792 clock_info); in trinity_parse_power_table()
1806 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1808 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_power_table()
[all …]
Drv6xx_dpm.c1819 union pplib_clock_info *clock_info) in rv6xx_parse_pplib_clock_info() argument
1839 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv6xx_parse_pplib_clock_info()
1840 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1841 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow); in rv6xx_parse_pplib_clock_info()
1842 mclk |= clock_info->r600.ucMemoryClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1846 pl->vddc = le16_to_cpu(clock_info->r600.usVDDC); in rv6xx_parse_pplib_clock_info()
1847 pl->flags = le32_to_cpu(clock_info->r600.ulFlags); in rv6xx_parse_pplib_clock_info()
1879 union pplib_clock_info *clock_info; in rv6xx_parse_power_table() local
1918 clock_info = (union pplib_clock_info *) in rv6xx_parse_power_table()
1924 clock_info); in rv6xx_parse_power_table()
Dsumo_dpm.c1432 union pplib_clock_info *clock_info) in sumo_parse_pplib_clock_info() argument
1439 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in sumo_parse_pplib_clock_info()
1440 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in sumo_parse_pplib_clock_info()
1442 pl->vddc_index = clock_info->sumo.vddcIndex; in sumo_parse_pplib_clock_info()
1443 pl->sclk_dpm_tdp_limit = clock_info->sumo.tdpLimit; in sumo_parse_pplib_clock_info()
1459 union pplib_clock_info *clock_info; in sumo_parse_power_table() local
1496 if (!rdev->pm.power_state[i].clock_info) in sumo_parse_power_table()
1511 clock_info = (union pplib_clock_info *) in sumo_parse_power_table()
1516 clock_info); in sumo_parse_power_table()
Dkv_dpm.c2611 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2618 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2619 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2621 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2637 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2674 if (!rdev->pm.power_state[i].clock_info) in kv_parse_power_table()
2690 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2695 clock_info); in kv_parse_power_table()
2709 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2711 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
[all …]
Dsi_dpm.c6786 union pplib_clock_info *clock_info) in si_parse_pplib_clock_info() argument
6798 pl->sclk = le16_to_cpu(clock_info->si.usEngineClockLow); in si_parse_pplib_clock_info()
6799 pl->sclk |= clock_info->si.ucEngineClockHigh << 16; in si_parse_pplib_clock_info()
6800 pl->mclk = le16_to_cpu(clock_info->si.usMemoryClockLow); in si_parse_pplib_clock_info()
6801 pl->mclk |= clock_info->si.ucMemoryClockHigh << 16; in si_parse_pplib_clock_info()
6803 pl->vddc = le16_to_cpu(clock_info->si.usVDDC); in si_parse_pplib_clock_info()
6804 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI); in si_parse_pplib_clock_info()
6805 pl->flags = le32_to_cpu(clock_info->si.ulFlags); in si_parse_pplib_clock_info()
6809 clock_info->si.ucPCIEGen); in si_parse_pplib_clock_info()
6866 union pplib_clock_info *clock_info; in si_parse_power_table() local
[all …]
Dci_dpm.c5456 union pplib_clock_info *clock_info) in ci_parse_pplib_clock_info() argument
5464 pl->sclk = le16_to_cpu(clock_info->ci.usEngineClockLow); in ci_parse_pplib_clock_info()
5465 pl->sclk |= clock_info->ci.ucEngineClockHigh << 16; in ci_parse_pplib_clock_info()
5466 pl->mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow); in ci_parse_pplib_clock_info()
5467 pl->mclk |= clock_info->ci.ucMemoryClockHigh << 16; in ci_parse_pplib_clock_info()
5472 clock_info->ci.ucPCIEGen); in ci_parse_pplib_clock_info()
5475 le16_to_cpu(clock_info->ci.usPCIELane)); in ci_parse_pplib_clock_info()
5529 union pplib_clock_info *clock_info; in ci_parse_power_table() local
5566 if (!rdev->pm.power_state[i].clock_info) in ci_parse_power_table()
5585 clock_info = (union pplib_clock_info *) in ci_parse_power_table()
[all …]
Dni_dpm.c3920 union pplib_clock_info *clock_info) in ni_parse_pplib_clock_info() argument
3929 pl->sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in ni_parse_pplib_clock_info()
3930 pl->sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in ni_parse_pplib_clock_info()
3931 pl->mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in ni_parse_pplib_clock_info()
3932 pl->mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in ni_parse_pplib_clock_info()
3934 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); in ni_parse_pplib_clock_info()
3935 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in ni_parse_pplib_clock_info()
3936 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags); in ni_parse_pplib_clock_info()
3989 union pplib_clock_info *clock_info; in ni_parse_power_table() local
4029 clock_info = (union pplib_clock_info *) in ni_parse_power_table()
[all …]
/drivers/clk/ingenic/
Dcgu.c89 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_recalc_rate()
163 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_round_rate()
182 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_set_rate()
243 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_get_parent()
272 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_set_parent()
321 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_recalc_rate()
369 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_round_rate()
392 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_set_rate()
446 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_enable()
465 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_disable()
[all …]
Dcgu.h183 const struct ingenic_cgu_clk_info *clock_info; member
214 ingenic_cgu_new(const struct ingenic_cgu_clk_info *clock_info,
/drivers/gpu/drm/amd/powerplay/hwmgr/
Dprocesspptables.h37 const void *clock_info);
Dhardwaremanager.c395 …ks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in phm_get_current_shallow_sleep_clocks() argument
402 return hwmgr->hwmgr_func->get_current_shallow_sleep_clocks(hwmgr, state, clock_info); in phm_get_current_shallow_sleep_clocks()
Dcz_hwmgr.c1489 const void *clock_info) in cz_dpm_get_pp_table_entry_callback() argument
1493 const ATOM_PPLIB_CZ_CLOCK_INFO *cz_clock_info = clock_info; in cz_dpm_get_pp_table_entry_callback()
1733 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) in cz_get_current_shallow_sleep_clocks() argument
1737 clock_info->min_eng_clk = ps->levels[0].engineClock / (1 << (ps->levels[0].ssDividerIndex)); in cz_get_current_shallow_sleep_clocks()
1738 …clock_info->max_eng_clk = ps->levels[ps->level - 1].engineClock / (1 << (ps->levels[ps->level - 1]… in cz_get_current_shallow_sleep_clocks()
/drivers/video/fbdev/omap2/omapfb/dss/
Dsdi.c160 sdi.mgr_config.clock_info = dispc_cinfo; in sdi_display_enable()
191 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info); in sdi_display_enable()
Dmanager.c197 struct dispc_clock_info cinfo = config->clock_info; in dss_mgr_check_lcd_config()
Ddpi.c301 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dsi_clk()
325 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dispc_clk()
/drivers/gpu/drm/omapdrm/dss/
Dsdi.c161 sdi.mgr_config.clock_info = dispc_cinfo; in sdi_display_enable()
192 dispc_mgr_set_clock_div(channel, &sdi.mgr_config.clock_info); in sdi_display_enable()
Ddpi.c299 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_pll_clk()
323 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dispc_clk()
/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.c2704 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2711 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2712 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2714 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2730 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2783 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2788 clock_info); in kv_parse_power_table()
2802 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2804 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
2805 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_power_table()
Dcz_dpm.c239 union pplib_clock_info *clock_info) in cz_parse_pplib_clock_info() argument
247 pl->sclk = table->entries[clock_info->carrizo.index].clk; in cz_parse_pplib_clock_info()
248 pl->vddc_index = table->entries[clock_info->carrizo.index].v; in cz_parse_pplib_clock_info()
306 union pplib_clock_info *clock_info; in cz_parse_power_table() local
368 clock_info = (union pplib_clock_info *) in cz_parse_power_table()
372 k, clock_info); in cz_parse_power_table()
/drivers/gpu/drm/amd/powerplay/inc/
Dhwmgr.h349 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info);
371 void **clock_info,

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