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Searched refs:cr1 (Results 1 – 10 of 10) sorted by relevance

/drivers/spi/
Dspi-sh.c86 unsigned long cr1; member
196 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
199 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
201 if (ret == 0 && !(ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
212 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
215 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
217 if (ret == 0 && (ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
248 ss->cr1 &= ~SPI_SH_RBF; in spi_sh_receive()
251 ss->cr1 & SPI_SH_RBF, in spi_sh_receive()
402 unsigned long cr1; in spi_sh_irq() local
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Dspi-pxa2xx.c974 u32 cr1; in pump_transfers() local
1102 cr1 = chip->cr1 | dma_thresh | drv_data->dma_cr1; in pump_transfers()
1111 cr1 = chip->cr1 | chip->threshold | drv_data->int_cr1; in pump_transfers()
1146 != (cr1 & change_mask)) { in pump_transfers()
1152 pxa2xx_spi_write(drv_data, SSCR1, cr1 & change_mask); in pump_transfers()
1165 pxa2xx_spi_write(drv_data, SSCR1, cr1); in pump_transfers()
1313 chip->cr1 = 0; in setup()
1325 chip->cr1 = SSCR1_LBM; in setup()
1363 chip->cr1 &= ~(SSCR1_SPO | SSCR1_SPH); in setup()
1364 chip->cr1 |= (((spi->mode & SPI_CPHA) != 0) ? SSCR1_SPH : 0) in setup()
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Dspi-pl022.c427 u16 cr1; member
574 writew(chip->cr1, SSP_CR1(pl022->virtbase)); in restore_state()
1957 chip->cr1 = 0; in pl022_setup()
1985 SSP_WRITE_BITS(chip->cr1, chip_info->clkdelay, in pl022_setup()
1995 SSP_WRITE_BITS(chip->cr1, chip_info->wait_state, in pl022_setup()
2008 SSP_WRITE_BITS(chip->cr1, tmp, SSP_CR1_MASK_RENDN_ST, 4); in pl022_setup()
2009 SSP_WRITE_BITS(chip->cr1, etx, SSP_CR1_MASK_TENDN_ST, 5); in pl022_setup()
2010 SSP_WRITE_BITS(chip->cr1, chip_info->rx_lev_trig, in pl022_setup()
2012 SSP_WRITE_BITS(chip->cr1, chip_info->tx_lev_trig, in pl022_setup()
2041 SSP_WRITE_BITS(chip->cr1, tmp, SSP_CR1_MASK_LBM, 0); in pl022_setup()
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Dspi-pxa2xx.h75 u32 cr1; member
/drivers/tty/serial/
Dstm32-usart.c210 stm32_set_bits(port, ofs->cr1, USART_CR1_TXEIE); in stm32_transmit_chars_pio()
389 stm32_clr_bits(port, ofs->cr1, USART_CR1_TXEIE); in stm32_stop_tx()
411 stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE); in stm32_throttle()
423 stm32_set_bits(port, ofs->cr1, USART_CR1_RXNEIE); in stm32_unthrottle()
433 stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE); in stm32_stop_rx()
456 stm32_set_bits(port, ofs->cr1, val); in stm32_startup()
470 stm32_clr_bits(port, ofs->cr1, val); in stm32_shutdown()
484 u32 cr1, cr2, cr3; in stm32_set_termios() local
495 writel_relaxed(0, port->membase + ofs->cr1); in stm32_set_termios()
497 cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE; in stm32_set_termios()
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Dstm32-usart.h11 u8 cr1; member
43 .cr1 = 0x0c,
59 .cr1 = 0x00,
Dfsl_lpuart.c1271 unsigned char cr1, old_cr1, old_cr2, cr3, cr4, bdh, modem; in lpuart_set_termios() local
1276 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1299 cr1 = old_cr1 & ~UARTCR1_M; in lpuart_set_termios()
1306 cr1 |= UARTCR1_M; in lpuart_set_termios()
1332 cr1 &= ~UARTCR1_PE; in lpuart_set_termios()
1338 cr1 |= UARTCR1_PE; in lpuart_set_termios()
1340 cr1 |= UARTCR1_M; in lpuart_set_termios()
1342 cr1 |= UARTCR1_PT; in lpuart_set_termios()
1344 cr1 &= ~UARTCR1_PT; in lpuart_set_termios()
1394 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
/drivers/input/touchscreen/
Dmc13783_ts.c74 int cr0, cr1; in mc13783_ts_report_sample() local
87 cr1 = (priv->sample[3] >> 12) & 0xfff; in mc13783_ts_report_sample()
91 x0, x1, x2, y0, y1, y2, cr0, cr1); in mc13783_ts_report_sample()
96 cr0 = (cr0 + cr1) / 2; in mc13783_ts_report_sample()
/drivers/mtd/devices/
Dst_spi_fsm.c1398 uint8_t sr1, cr1, dyb; in stfsm_s25fl_config() local
1448 stfsm_read_status(fsm, SPINOR_OP_RDSR2, &cr1, 1); in stfsm_s25fl_config()
1451 if (!(cr1 & STFSM_S25FL_CONFIG_QE)) { in stfsm_s25fl_config()
1453 cr1 |= STFSM_S25FL_CONFIG_QE; in stfsm_s25fl_config()
1458 if (cr1 & STFSM_S25FL_CONFIG_QE) { in stfsm_s25fl_config()
1460 cr1 &= ~STFSM_S25FL_CONFIG_QE; in stfsm_s25fl_config()
1467 sta_wr = ((uint16_t)cr1 << 8) | sr1; in stfsm_s25fl_config()
/drivers/parport/
Dparport_pc.c958 int cr1, cr4, cra, cr23, cr26, cr27; in show_parconfig_smsc37c669() local
970 cr1 = inb(io + 1); in show_parconfig_smsc37c669()
987 cr1, cr4, cra, cr23, cr26, cr27); in show_parconfig_smsc37c669()
1000 (cr1 & 4) ? "yes" : "no"); in show_parconfig_smsc37c669()
1003 (cr1 & 0x08) ? "Standard mode only (SPP)" in show_parconfig_smsc37c669()