| /drivers/isdn/hisax/ |
| D | icc.c | 32 ICCVersion(struct IsdnCardState *cs, char *s) in ICCVersion() argument
36 val = cs->readisac(cs, ICC_RBCH); in ICCVersion()
41 ph_command(struct IsdnCardState *cs, unsigned int command) in ph_command() argument
43 if (cs->debug & L1_DEB_ISAC) in ph_command()
44 debugl1(cs, "ph_command %x", command); in ph_command()
45 cs->writeisac(cs, ICC_CIX0, (command << 2) | 3); in ph_command()
50 icc_new_ph(struct IsdnCardState *cs) in icc_new_ph() argument
52 switch (cs->dc.icc.ph_state) { in icc_new_ph()
54 ph_command(cs, ICC_CMD_DI); in icc_new_ph()
55 l1_msg(cs, HW_RESET | INDICATION, NULL); in icc_new_ph()
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| D | isac.c | 31 void ISACVersion(struct IsdnCardState *cs, char *s) in ISACVersion() argument
35 val = cs->readisac(cs, ISAC_RBCH); in ISACVersion()
40 ph_command(struct IsdnCardState *cs, unsigned int command) in ph_command() argument
42 if (cs->debug & L1_DEB_ISAC) in ph_command()
43 debugl1(cs, "ph_command %x", command); in ph_command()
44 cs->writeisac(cs, ISAC_CIX0, (command << 2) | 3); in ph_command()
49 isac_new_ph(struct IsdnCardState *cs) in isac_new_ph() argument
51 switch (cs->dc.isac.ph_state) { in isac_new_ph()
54 ph_command(cs, ISAC_CMD_DUI); in isac_new_ph()
55 l1_msg(cs, HW_RESET | INDICATION, NULL); in isac_new_ph()
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| D | amd7930_fn.c | 64 static void Amd7930_new_ph(struct IsdnCardState *cs);
102 WriteWordAmd7930(struct IsdnCardState *cs, BYTE reg, WORD val) in WriteWordAmd7930() argument
104 wByteAMD(cs, 0x00, reg); in WriteWordAmd7930()
105 wByteAMD(cs, 0x01, LOBYTE(val)); in WriteWordAmd7930()
106 wByteAMD(cs, 0x01, HIBYTE(val)); in WriteWordAmd7930()
110 ReadWordAmd7930(struct IsdnCardState *cs, BYTE reg) in ReadWordAmd7930() argument
115 res = rByteAMD(cs, reg); in ReadWordAmd7930()
116 res += 256 * rByteAMD(cs, reg); in ReadWordAmd7930()
120 wByteAMD(cs, 0x00, reg); in ReadWordAmd7930()
121 res = rByteAMD(cs, 0x01); in ReadWordAmd7930()
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| D | elsa.c | 136 static void set_arcofi(struct IsdnCardState *cs, int bc);
176 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
178 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset)); in ReadISAC()
182 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
184 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset, value); in WriteISAC()
188 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
190 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size); in ReadISACfifo()
194 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
196 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size); in WriteISACfifo()
200 ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) in ReadISAC_IPAC() argument
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| D | hfc_sx.c | 62 Write_hfc(struct IsdnCardState *cs, u_char regnum, u_char val) in Write_hfc() argument
64 byteout(cs->hw.hfcsx.base + 1, regnum); in Write_hfc()
65 byteout(cs->hw.hfcsx.base, val); in Write_hfc()
69 Read_hfc(struct IsdnCardState *cs, u_char regnum) in Read_hfc() argument
73 byteout(cs->hw.hfcsx.base + 1, regnum); in Read_hfc()
74 ret = bytein(cs->hw.hfcsx.base); in Read_hfc()
83 fifo_select(struct IsdnCardState *cs, u_char fifo) in fifo_select() argument
85 if (fifo == cs->hw.hfcsx.last_fifo) in fifo_select()
88 byteout(cs->hw.hfcsx.base + 1, HFCSX_FIF_SEL); in fifo_select()
89 byteout(cs->hw.hfcsx.base, fifo); in fifo_select()
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| D | ipacx.c | 35 static void ph_command(struct IsdnCardState *cs, unsigned int command);
36 static inline void cic_int(struct IsdnCardState *cs);
38 static void dbusy_timer_handler(struct IsdnCardState *cs);
39 static void dch_empty_fifo(struct IsdnCardState *cs, int count);
40 static void dch_fill_fifo(struct IsdnCardState *cs);
41 static inline void dch_int(struct IsdnCardState *cs);
42 static void dch_setstack(struct PStack *st, struct IsdnCardState *cs);
43 static void dch_init(struct IsdnCardState *cs);
47 static void bch_int(struct IsdnCardState *cs, u_char hscx);
50 static int bch_open_state(struct IsdnCardState *cs, struct BCState *bcs);
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| D | hfc_2bds0.c | 29 dummyf(struct IsdnCardState *cs, u_char *data, int size) in dummyf() argument
35 ReadReg(struct IsdnCardState *cs, int data, u_char reg) in ReadReg() argument
40 if (cs->hw.hfcD.cip != reg) { in ReadReg()
41 cs->hw.hfcD.cip = reg; in ReadReg()
42 byteout(cs->hw.hfcD.addr | 1, reg); in ReadReg()
44 ret = bytein(cs->hw.hfcD.addr); in ReadReg()
46 if (cs->debug & L1_DEB_HSCX_FIFO && (data != 2)) in ReadReg()
47 debugl1(cs, "t3c RD %02x %02x", reg, ret); in ReadReg()
50 ret = bytein(cs->hw.hfcD.addr | 1); in ReadReg()
55 WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value) in WriteReg() argument
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| D | w6692.c | 51 W6692Version(struct IsdnCardState *cs, char *s) in W6692Version() argument
55 val = cs->readW6692(cs, W_D_RBCH); in W6692Version()
60 ph_command(struct IsdnCardState *cs, unsigned int command) in ph_command() argument
62 if (cs->debug & L1_DEB_ISAC) in ph_command()
63 debugl1(cs, "ph_command %x", command); in ph_command()
64 cs->writeisac(cs, W_CIX, command); in ph_command()
69 W6692_new_ph(struct IsdnCardState *cs) in W6692_new_ph() argument
71 switch (cs->dc.w6692.ph_state) { in W6692_new_ph()
73 ph_command(cs, W_L1CMD_DRC); in W6692_new_ph()
74 l1_msg(cs, HW_RESET | INDICATION, NULL); in W6692_new_ph()
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| D | sedlbauer.c | 154 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
156 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset)); in ReadISAC()
160 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
162 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset, value); in WriteISAC()
166 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
168 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size); in ReadISACfifo()
172 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
174 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size); in WriteISACfifo()
178 ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) in ReadISAC_IPAC() argument
180 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80)); in ReadISAC_IPAC()
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| D | hfc_pci.c | 73 release_io_hfcpci(struct IsdnCardState *cs) in release_io_hfcpci() argument
76 cs->hw.hfcpci.pci_io); in release_io_hfcpci()
77 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ in release_io_hfcpci()
78 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
79 Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */ in release_io_hfcpci()
81 Write_hfc(cs, HFCPCI_CIRM, 0); /* Reset Off */ in release_io_hfcpci()
83 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); in release_io_hfcpci()
84 …pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, 0); /* disable memory mapped ports + busmast… in release_io_hfcpci()
85 del_timer(&cs->hw.hfcpci.timer); in release_io_hfcpci()
86 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000, in release_io_hfcpci()
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| D | enternow_pci.c | 97 ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset) in ReadByteAmd7930() argument
101 return (inb(cs->hw.njet.isac + 4 * offset)); in ReadByteAmd7930()
105 outb(offset, cs->hw.njet.isac + 4 * AMD_CR); in ReadByteAmd7930()
106 return (inb(cs->hw.njet.isac + 4 * AMD_DR)); in ReadByteAmd7930()
112 WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value) in WriteByteAmd7930() argument
116 outb(value, cs->hw.njet.isac + 4 * offset); in WriteByteAmd7930()
120 outb(offset, cs->hw.njet.isac + 4 * AMD_CR); in WriteByteAmd7930()
121 outb(value, cs->hw.njet.isac + 4 * AMD_DR); in WriteByteAmd7930()
127 enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) { in enpci_setIrqMask() argument
129 outb(0x00, cs->hw.njet.base + NETJET_IRQMASK1); in enpci_setIrqMask()
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| D | diva.c | 132 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
134 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset)); in ReadISAC()
138 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
140 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value); in WriteISAC()
144 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
146 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); in ReadISACfifo()
150 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
152 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); in WriteISACfifo()
156 ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) in ReadISAC_IPAC() argument
158 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset + 0x80)); in ReadISAC_IPAC()
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| D | teles3.c | 56 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
58 return (readreg(cs->hw.teles3.isac, offset)); in ReadISAC()
62 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
64 writereg(cs->hw.teles3.isac, offset, value); in WriteISAC()
68 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
70 read_fifo(cs->hw.teles3.isacfifo, data, size); in ReadISACfifo()
74 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
76 write_fifo(cs->hw.teles3.isacfifo, data, size); in WriteISACfifo()
80 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
82 return (readreg(cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX()
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| D | hfcscard.c | 24 struct IsdnCardState *cs = dev_id; in hfcs_interrupt() local
28 spin_lock_irqsave(&cs->lock, flags); in hfcs_interrupt()
30 (stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) { in hfcs_interrupt()
31 val = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_INT_S1); in hfcs_interrupt()
32 if (cs->debug & L1_DEB_ISAC) in hfcs_interrupt()
33 debugl1(cs, "HFCS: stat(%02x) s1(%02x)", stat, val); in hfcs_interrupt()
34 hfc2bds0_interrupt(cs, val); in hfcs_interrupt()
36 if (cs->debug & L1_DEB_ISAC) in hfcs_interrupt()
37 debugl1(cs, "HFCS: irq_no_irq stat(%02x)", stat); in hfcs_interrupt()
39 spin_unlock_irqrestore(&cs->lock, flags); in hfcs_interrupt()
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| D | asuscom.c | 78 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
80 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset)); in ReadISAC()
84 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
86 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset, value); in WriteISAC()
90 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
92 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size); in ReadISACfifo()
96 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
98 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size); in WriteISACfifo()
102 ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) in ReadISAC_IPAC() argument
104 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80)); in ReadISAC_IPAC()
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| D | nj_u.c | 19 static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off) in dummyrr() argument
24 static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value) in dummywr() argument
31 struct IsdnCardState *cs = dev_id; in netjet_u_interrupt() local
35 spin_lock_irqsave(&cs->lock, flags); in netjet_u_interrupt()
36 if (!((sval = bytein(cs->hw.njet.base + NETJET_IRQSTAT1)) & in netjet_u_interrupt()
38 val = NETjet_ReadIC(cs, ICC_ISTA); in netjet_u_interrupt()
39 if (cs->debug & L1_DEB_ISAC) in netjet_u_interrupt()
40 debugl1(cs, "tiger: i1 %x %x", sval, val); in netjet_u_interrupt()
42 icc_interrupt(cs, val); in netjet_u_interrupt()
43 NETjet_WriteIC(cs, ICC_MASK, 0xFF); in netjet_u_interrupt()
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| D | nj_s.c | 19 static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off) in dummyrr() argument
24 static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value) in dummywr() argument
31 struct IsdnCardState *cs = dev_id; in netjet_s_interrupt() local
35 spin_lock_irqsave(&cs->lock, flags); in netjet_s_interrupt()
36 s1val = bytein(cs->hw.njet.base + NETJET_IRQSTAT1); in netjet_s_interrupt()
38 val = NETjet_ReadIC(cs, ISAC_ISTA); in netjet_s_interrupt()
39 if (cs->debug & L1_DEB_ISAC) in netjet_s_interrupt()
40 debugl1(cs, "tiger: i1 %x %x", s1val, val); in netjet_s_interrupt()
42 isac_interrupt(cs, val); in netjet_s_interrupt()
43 NETjet_WriteIC(cs, ISAC_MASK, 0xFF); in netjet_s_interrupt()
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| D | gazel.c | 104 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
108 switch (cs->subtyp) { in ReadISAC()
112 return (readreg(cs->hw.gazel.isac, off2)); in ReadISAC()
115 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); in ReadISAC()
121 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
125 switch (cs->subtyp) { in WriteISAC()
129 writereg(cs->hw.gazel.isac, off2, value); in WriteISAC()
133 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); in WriteISAC()
139 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
141 switch (cs->subtyp) { in ReadISACfifo()
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| D | hscx.c | 26 HscxVersion(struct IsdnCardState *cs, char *s) in HscxVersion() argument
30 verA = cs->BC_Read_Reg(cs, 0, HSCX_VSTR) & 0xf; in HscxVersion()
31 verB = cs->BC_Read_Reg(cs, 1, HSCX_VSTR) & 0xf; in HscxVersion()
43 struct IsdnCardState *cs = bcs->cs; in modehscx() local
46 if (cs->debug & L1_DEB_HSCX) in modehscx()
47 debugl1(cs, "hscx %c mode %d ichan %d", in modehscx()
51 cs->BC_Write_Reg(cs, hscx, HSCX_XAD1, 0xFF); in modehscx()
52 cs->BC_Write_Reg(cs, hscx, HSCX_XAD2, 0xFF); in modehscx()
53 cs->BC_Write_Reg(cs, hscx, HSCX_RAH2, 0xFF); in modehscx()
54 cs->BC_Write_Reg(cs, hscx, HSCX_XBCH, 0x0); in modehscx()
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| D | elsa_ser.c | 48 static inline unsigned int serial_in(struct IsdnCardState *cs, int offset) in serial_in() argument
51 u_int val = inb(cs->hw.elsa.base + 8 + offset); in serial_in()
52 debugl1(cs, "in %s %02x", ModemIn[offset], val); in serial_in()
55 return inb(cs->hw.elsa.base + 8 + offset); in serial_in()
59 static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset) in serial_inp() argument
63 u_int val = inb(cs->hw.elsa.base + 8 + offset); in serial_inp()
64 debugl1(cs, "inp %s %02x", ModemIn[offset], val); in serial_inp()
66 u_int val = inb_p(cs->hw.elsa.base + 8 + offset); in serial_inp()
67 debugl1(cs, "inP %s %02x", ModemIn[offset], val); in serial_inp()
72 return inb(cs->hw.elsa.base + 8 + offset); in serial_inp()
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| D | avm_a1.c | 56 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
58 return (readreg(cs->hw.avm.isac, offset)); in ReadISAC()
62 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
64 writereg(cs->hw.avm.isac, offset, value); in WriteISAC()
68 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
70 read_fifo(cs->hw.avm.isacfifo, data, size); in ReadISACfifo()
74 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
76 write_fifo(cs->hw.avm.isacfifo, data, size); in WriteISACfifo()
80 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
82 return (readreg(cs->hw.avm.hscx[hscx], offset)); in ReadHSCX()
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| D | saphir.c | 68 ReadISAC(struct IsdnCardState *cs, u_char offset) in ReadISAC() argument
70 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset)); in ReadISAC()
74 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) in WriteISAC() argument
76 writereg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset, value); in WriteISAC()
80 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size) in ReadISACfifo() argument
82 readfifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); in ReadISACfifo()
86 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size) in WriteISACfifo() argument
88 writefifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); in WriteISACfifo()
92 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) in ReadHSCX() argument
94 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, in ReadHSCX()
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| /drivers/isdn/gigaset/ |
| D | common.c | 89 static int setflags(struct cardstate *cs, unsigned flags, unsigned delay) in setflags() argument
93 r = cs->ops->set_modem_ctrl(cs, cs->control_state, flags); in setflags()
94 cs->control_state = flags; in setflags()
106 int gigaset_enterconfigmode(struct cardstate *cs) in gigaset_enterconfigmode() argument
110 cs->control_state = TIOCM_RTS; in gigaset_enterconfigmode()
112 r = setflags(cs, TIOCM_DTR, 200); in gigaset_enterconfigmode()
115 r = setflags(cs, 0, 200); in gigaset_enterconfigmode()
119 r = setflags(cs, TIOCM_RTS, 100); in gigaset_enterconfigmode()
122 r = setflags(cs, 0, 100); in gigaset_enterconfigmode()
126 r = setflags(cs, TIOCM_RTS | TIOCM_DTR, 800); in gigaset_enterconfigmode()
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| D | interface.c | 21 static int if_lock(struct cardstate *cs, int *arg) in if_lock() argument
25 gig_dbg(DEBUG_IF, "%u: if_lock (%d)", cs->minor_index, cmd); in if_lock()
31 *arg = cs->mstate == MS_LOCKED; in if_lock()
35 if (!cmd && cs->mstate == MS_LOCKED && cs->connected) { in if_lock()
36 cs->ops->set_modem_ctrl(cs, 0, TIOCM_DTR | TIOCM_RTS); in if_lock()
37 cs->ops->baud_rate(cs, B115200); in if_lock()
38 cs->ops->set_line_ctrl(cs, CS8); in if_lock()
39 cs->control_state = TIOCM_DTR | TIOCM_RTS; in if_lock()
42 cs->waiting = 1; in if_lock()
43 if (!gigaset_add_event(cs, &cs->at_state, EV_IF_LOCK, in if_lock()
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| D | ev-layer.c | 407 static void add_cid_event(struct cardstate *cs, int cid, int type, in add_cid_event() argument
416 spin_lock_irqsave(&cs->ev_lock, flags); in add_cid_event()
418 tail = cs->ev_tail; in add_cid_event()
420 if (unlikely(next == cs->ev_head)) { in add_cid_event()
421 dev_err(cs->dev, "event queue full\n"); in add_cid_event()
424 event = cs->events + tail; in add_cid_event()
431 cs->ev_tail = next; in add_cid_event()
434 spin_unlock_irqrestore(&cs->ev_lock, flags); in add_cid_event()
445 void gigaset_handle_modem_response(struct cardstate *cs) in gigaset_handle_modem_response() argument
453 if (!cs->cbytes) { in gigaset_handle_modem_response()
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