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Searched refs:ctl (Results 1 – 25 of 257) sorted by relevance

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/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5_ctl.c97 void ctl_write(struct mdp5_ctl *ctl, u32 reg, u32 data) in ctl_write() argument
99 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_write()
101 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_write()
106 u32 ctl_read(struct mdp5_ctl *ctl, u32 reg) in ctl_read() argument
108 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_read()
110 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_read()
149 static void set_ctl_op(struct mdp5_ctl *ctl, struct mdp5_interface *intf) in set_ctl_op() argument
172 spin_lock_irqsave(&ctl->hw_lock, flags); in set_ctl_op()
173 ctl_write(ctl, REG_MDP5_CTL_OP(ctl->id), ctl_op); in set_ctl_op()
174 spin_unlock_irqrestore(&ctl->hw_lock, flags); in set_ctl_op()
[all …]
Dmdp5_ctl.h37 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl);
40 int mdp5_ctl_set_pipeline(struct mdp5_ctl *ctl, struct mdp5_interface *intf,
42 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, bool enabled);
44 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, int cursor_id, bool enable);
59 int mdp5_ctl_blend(struct mdp5_ctl *ctl, u8 *stage, u32 stage_cnt,
74 u32 mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask);
75 u32 mdp5_ctl_get_commit_status(struct mdp5_ctl *ctl);
Dmdp5_encoder.c31 struct mdp5_ctl *ctl; member
221 mdp5_encoder->ctl); in mdp5_encoder_mode_set()
228 struct mdp5_ctl *ctl = mdp5_encoder->ctl; in mdp5_encoder_disable() local
237 mdp5_ctl_set_encoder_state(ctl, false); in mdp5_encoder_disable()
242 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); in mdp5_encoder_disable()
263 struct mdp5_ctl *ctl = mdp5_encoder->ctl; in mdp5_encoder_enable() local
275 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); in mdp5_encoder_enable()
277 mdp5_ctl_set_encoder_state(ctl, true); in mdp5_encoder_enable()
338 mdp5_ctl_pair(mdp5_encoder->ctl, mdp5_slave_enc->ctl, true); in mdp5_encoder_set_split_display()
347 struct mdp5_interface *intf, struct mdp5_ctl *ctl) in mdp5_encoder_init() argument
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Dmdp5_cmd_encoder.c25 struct mdp5_ctl *ctl; member
209 mdp5_cmd_enc->ctl); in mdp5_cmd_encoder_mode_set()
215 struct mdp5_ctl *ctl = mdp5_cmd_enc->ctl; in mdp5_cmd_encoder_disable() local
223 mdp5_ctl_set_encoder_state(ctl, false); in mdp5_cmd_encoder_disable()
224 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); in mdp5_cmd_encoder_disable()
234 struct mdp5_ctl *ctl = mdp5_cmd_enc->ctl; in mdp5_cmd_encoder_enable() local
244 mdp5_ctl_commit(ctl, mdp_ctl_flush_mask_encoder(intf)); in mdp5_cmd_encoder_enable()
246 mdp5_ctl_set_encoder_state(ctl, true); in mdp5_cmd_encoder_enable()
298 struct mdp5_interface *intf, struct mdp5_ctl *ctl) in mdp5_cmd_encoder_init() argument
318 mdp5_cmd_enc->ctl = ctl; in mdp5_cmd_encoder_init()
/drivers/thunderbolt/
Dctl.c18 struct tb_ctl *ctl; member
43 #define tb_ctl_WARN(ctl, format, arg...) \ argument
44 dev_WARN(&(ctl)->nhi->pdev->dev, format, ## arg)
46 #define tb_ctl_err(ctl, format, arg...) \ argument
47 dev_err(&(ctl)->nhi->pdev->dev, format, ## arg)
49 #define tb_ctl_warn(ctl, format, arg...) \ argument
50 dev_warn(&(ctl)->nhi->pdev->dev, format, ## arg)
52 #define tb_ctl_info(ctl, format, arg...) \ argument
53 dev_info(&(ctl)->nhi->pdev->dev, format, ## arg)
237 static void tb_cfg_print_error(struct tb_ctl *ctl, in tb_cfg_print_error() argument
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Deeprom.c14 static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl) in tb_eeprom_ctl_write() argument
16 return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); in tb_eeprom_ctl_write()
22 static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl) in tb_eeprom_ctl_read() argument
24 return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1); in tb_eeprom_ctl_read()
40 struct tb_eeprom_ctl ctl; in tb_eeprom_active() local
41 int res = tb_eeprom_ctl_read(sw, &ctl); in tb_eeprom_active()
45 ctl.access_high = 1; in tb_eeprom_active()
46 res = tb_eeprom_ctl_write(sw, &ctl); in tb_eeprom_active()
49 ctl.access_low = 0; in tb_eeprom_active()
50 return tb_eeprom_ctl_write(sw, &ctl); in tb_eeprom_active()
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Dctl.h18 void tb_ctl_start(struct tb_ctl *ctl);
19 void tb_ctl_stop(struct tb_ctl *ctl);
20 void tb_ctl_free(struct tb_ctl *ctl);
56 int tb_cfg_error(struct tb_ctl *ctl, u64 route, u32 port,
58 struct tb_cfg_result tb_cfg_reset(struct tb_ctl *ctl, u64 route,
60 struct tb_cfg_result tb_cfg_read_raw(struct tb_ctl *ctl, void *buffer,
64 struct tb_cfg_result tb_cfg_write_raw(struct tb_ctl *ctl, void *buffer,
68 int tb_cfg_read(struct tb_ctl *ctl, void *buffer, u64 route, u32 port,
70 int tb_cfg_write(struct tb_ctl *ctl, void *buffer, u64 route, u32 port,
72 int tb_cfg_get_upstream_port(struct tb_ctl *ctl, u64 route);
/drivers/net/wireless/ath/wcn36xx/
Ddxe.c67 struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl, *next; in wcn36xx_dxe_free_ctl_block() local
70 for (i = 0; i < ch->desc_num && ctl; i++) { in wcn36xx_dxe_free_ctl_block()
71 next = ctl->next; in wcn36xx_dxe_free_ctl_block()
72 kfree(ctl); in wcn36xx_dxe_free_ctl_block()
73 ctl = next; in wcn36xx_dxe_free_ctl_block()
275 static int wcn36xx_dxe_fill_skb(struct device *dev, struct wcn36xx_dxe_ctl *ctl) in wcn36xx_dxe_fill_skb() argument
277 struct wcn36xx_dxe_desc *dxe = ctl->desc; in wcn36xx_dxe_fill_skb()
288 ctl->skb = skb; in wcn36xx_dxe_fill_skb()
350 struct wcn36xx_dxe_ctl *ctl; in reap_tx_dxes() local
360 ctl = ch->tail_blk_ctl; in reap_tx_dxes()
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/drivers/net/ethernet/chelsio/cxgb/
Dmv88e1xxx.c49 u32 ctl; in mv88e1xxx_reset() local
55 (void) simple_mdio_read(cphy, MII_BMCR, &ctl); in mv88e1xxx_reset()
56 ctl &= BMCR_RESET; in mv88e1xxx_reset()
57 if (ctl) in mv88e1xxx_reset()
59 } while (ctl && --time_out); in mv88e1xxx_reset()
61 return ctl ? -1 : 0; in mv88e1xxx_reset()
126 u32 ctl; in mv88e1xxx_set_speed_duplex() local
128 (void) simple_mdio_read(phy, MII_BMCR, &ctl); in mv88e1xxx_set_speed_duplex()
130 ctl &= ~(BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); in mv88e1xxx_set_speed_duplex()
132 ctl |= BMCR_SPEED100; in mv88e1xxx_set_speed_duplex()
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/drivers/net/wireless/broadcom/b43/
Dpio.c331 u16 ctl, in tx_write_2byte_queue() argument
339 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI; in tx_write_2byte_queue()
340 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); in tx_write_2byte_queue()
350 ctl &= ~B43_PIO_TXCTL_WRITEHI; in tx_write_2byte_queue()
351 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); in tx_write_2byte_queue()
359 return ctl; in tx_write_2byte_queue()
368 u16 ctl; in pio_tx_frame_2byte_queue() local
370 ctl = b43_piotx_read16(q, B43_PIO_TXCTL); in pio_tx_frame_2byte_queue()
371 ctl |= B43_PIO_TXCTL_FREADY; in pio_tx_frame_2byte_queue()
372 ctl &= ~B43_PIO_TXCTL_EOF; in pio_tx_frame_2byte_queue()
[all …]
/drivers/net/
Dsungem_phy.c315 u16 ctl, adv; in genmii_setup_aneg() local
337 ctl = sungem_phy_read(phy, MII_BMCR); in genmii_setup_aneg()
338 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); in genmii_setup_aneg()
339 sungem_phy_write(phy, MII_BMCR, ctl); in genmii_setup_aneg()
346 u16 ctl; in genmii_setup_forced() local
353 ctl = sungem_phy_read(phy, MII_BMCR); in genmii_setup_forced()
354 ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_ANENABLE); in genmii_setup_forced()
357 sungem_phy_write(phy, MII_BMCR, ctl | BMCR_RESET); in genmii_setup_forced()
364 ctl |= BMCR_SPEED100; in genmii_setup_forced()
371 ctl |= BMCR_FULLDPLX; in genmii_setup_forced()
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/drivers/char/hw_random/
Docteon-rng.c30 union cvmx_rnm_ctl_status ctl; in octeon_rng_init() local
33 ctl.u64 = 0; in octeon_rng_init()
34 ctl.s.ent_en = 1; /* Enable the entropy source. */ in octeon_rng_init()
35 ctl.s.rng_en = 1; /* Enable the RNG hardware. */ in octeon_rng_init()
36 cvmx_write_csr((u64)p->control_status, ctl.u64); in octeon_rng_init()
42 union cvmx_rnm_ctl_status ctl; in octeon_rng_cleanup() local
45 ctl.u64 = 0; in octeon_rng_cleanup()
47 cvmx_write_csr((u64)p->control_status, ctl.u64); in octeon_rng_cleanup()
Dpasemi-rng.c71 u32 ctl; in pasemi_rng_init() local
73 ctl = SDCRNG_CTL_DR | SDCRNG_CTL_SELECT_RRG_RNG | SDCRNG_CTL_KSZ; in pasemi_rng_init()
74 out_le32(rng_regs + SDCRNG_CTL_REG, ctl); in pasemi_rng_init()
75 out_le32(rng_regs + SDCRNG_CTL_REG, ctl & ~SDCRNG_CTL_DR); in pasemi_rng_init()
83 u32 ctl; in pasemi_rng_cleanup() local
85 ctl = SDCRNG_CTL_RE | SDCRNG_CTL_CE; in pasemi_rng_cleanup()
87 in_le32(rng_regs + SDCRNG_CTL_REG) & ~ctl); in pasemi_rng_cleanup()
/drivers/net/ethernet/ibm/emac/
Dphy.c111 int ctl, adv; in genmii_setup_aneg() local
119 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
120 if (ctl < 0) in genmii_setup_aneg()
121 return ctl; in genmii_setup_aneg()
122 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); in genmii_setup_aneg()
125 phy_write(phy, MII_BMCR, ctl); in genmii_setup_aneg()
161 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); in genmii_setup_aneg()
163 phy_write(phy, MII_BMCR, ctl); in genmii_setup_aneg()
170 int ctl; in genmii_setup_forced() local
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/drivers/net/ethernet/micrel/
Dks8842.c434 struct ks8842_tx_dma_ctl *ctl = &adapter->dma_tx; in ks8842_tx_frame_dma() local
435 u8 *buf = ctl->buf; in ks8842_tx_frame_dma()
437 if (ctl->adesc) { in ks8842_tx_frame_dma()
443 sg_dma_len(&ctl->sg) = skb->len + sizeof(u32); in ks8842_tx_frame_dma()
454 sg_dma_address(&ctl->sg), 0, sg_dma_len(&ctl->sg), in ks8842_tx_frame_dma()
458 if (sg_dma_len(&ctl->sg) % 4) in ks8842_tx_frame_dma()
459 sg_dma_len(&ctl->sg) += 4 - sg_dma_len(&ctl->sg) % 4; in ks8842_tx_frame_dma()
461 ctl->adesc = dmaengine_prep_slave_sg(ctl->chan, in ks8842_tx_frame_dma()
462 &ctl->sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT); in ks8842_tx_frame_dma()
463 if (!ctl->adesc) in ks8842_tx_frame_dma()
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/drivers/ide/
Dtx4939ide.c152 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); in tx4939ide_check_error_ints() local
154 if (ctl & TX4939IDE_INT_BUSERR) { in tx4939ide_check_error_ints()
164 if (ctl & (TX4939IDE_INT_ADDRERR | in tx4939ide_check_error_ints()
167 hwif->name, ctl, in tx4939ide_check_error_ints()
168 ctl & TX4939IDE_INT_ADDRERR ? " Address-Error" : "", in tx4939ide_check_error_ints()
169 ctl & TX4939IDE_INT_DEVTIMING ? " DEV-Timing" : "", in tx4939ide_check_error_ints()
170 ctl & TX4939IDE_INT_BUSERR ? " Bus-Error" : ""); in tx4939ide_check_error_ints()
171 return ctl; in tx4939ide_check_error_ints()
178 u16 ctl; in tx4939ide_clear_irq() local
188 ctl = tx4939ide_check_error_ints(hwif); in tx4939ide_clear_irq()
[all …]
Dide-legacy.c9 unsigned long base, ctl; in ide_legacy_init_one() local
14 ctl = 0x3f6; in ide_legacy_init_one()
18 ctl = 0x376; in ide_legacy_init_one()
28 if (!request_region(ctl, 1, d->name)) { in ide_legacy_init_one()
30 d->name, ctl); in ide_legacy_init_one()
35 ide_std_init_ports(hw, base, ctl); in ide_legacy_init_one()
Dide-pnp.c39 unsigned long base, ctl; in idepnp_probe() local
49 ctl = pnp_port_start(dev, 1); in idepnp_probe()
57 if (!request_region(ctl, 1, DRV_NAME)) { in idepnp_probe()
59 DRV_NAME, ctl); in idepnp_probe()
65 ide_std_init_ports(&hw, base, ctl); in idepnp_probe()
76 release_region(ctl, 1); in idepnp_probe()
/drivers/hwtracing/intel_th/
Dpti.c158 u32 ctl = PTI_EN; in intel_th_pti_activate() local
161 ctl |= pti->patgen << __ffs(PTI_PATGENMODE); in intel_th_pti_activate()
163 ctl |= PTI_FCEN; in intel_th_pti_activate()
164 ctl |= pti->mode << __ffs(PTI_MODE); in intel_th_pti_activate()
165 ctl |= pti->clkdiv << __ffs(PTI_CLKDIV); in intel_th_pti_activate()
167 iowrite32(ctl, pti->base + REG_PTI_CTL); in intel_th_pti_activate()
185 u32 ctl = ioread32(pti->base + REG_PTI_CTL); in read_hw_config() local
187 pti->mode = (ctl & PTI_MODE) >> __ffs(PTI_MODE); in read_hw_config()
188 pti->clkdiv = (ctl & PTI_CLKDIV) >> __ffs(PTI_CLKDIV); in read_hw_config()
189 pti->freeclk = !!(ctl & PTI_FCEN); in read_hw_config()
/drivers/media/pci/ttpci/
Dbudget.c661 const struct stv6110x_devctl *ctl; in frontend_init() local
674 ctl = dvb_attach(stv6110x_attach, in frontend_init()
679 if (ctl) { in frontend_init()
680 tt1600_stv090x_config.tuner_init = ctl->tuner_init; in frontend_init()
681 tt1600_stv090x_config.tuner_sleep = ctl->tuner_sleep; in frontend_init()
682 tt1600_stv090x_config.tuner_set_mode = ctl->tuner_set_mode; in frontend_init()
683 tt1600_stv090x_config.tuner_set_frequency = ctl->tuner_set_frequency; in frontend_init()
684 tt1600_stv090x_config.tuner_get_frequency = ctl->tuner_get_frequency; in frontend_init()
685 tt1600_stv090x_config.tuner_set_bandwidth = ctl->tuner_set_bandwidth; in frontend_init()
686 tt1600_stv090x_config.tuner_get_bandwidth = ctl->tuner_get_bandwidth; in frontend_init()
[all …]
/drivers/net/phy/
Det1011c.c54 int ctl = 0; in et1011c_config_aneg() local
55 ctl = phy_read(phydev, MII_BMCR); in et1011c_config_aneg()
56 if (ctl < 0) in et1011c_config_aneg()
57 return ctl; in et1011c_config_aneg()
58 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | in et1011c_config_aneg()
61 phy_write(phydev, MII_BMCR, ctl | BMCR_RESET); in et1011c_config_aneg()
/drivers/i2c/busses/
Di2c-pnx.c285 u32 ctl = 0; in i2c_pnx_master_rcv() local
311 ctl = ioread32(I2C_REG_CTL(alg_data)); in i2c_pnx_master_rcv()
312 ctl |= mcntrl_rffie | mcntrl_daie; in i2c_pnx_master_rcv()
313 ctl &= ~mcntrl_drmie; in i2c_pnx_master_rcv()
314 iowrite32(ctl, I2C_REG_CTL(alg_data)); in i2c_pnx_master_rcv()
344 ctl = ioread32(I2C_REG_CTL(alg_data)); in i2c_pnx_master_rcv()
345 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | in i2c_pnx_master_rcv()
347 iowrite32(ctl, I2C_REG_CTL(alg_data)); in i2c_pnx_master_rcv()
364 u32 stat, ctl; in i2c_pnx_interrupt() local
380 ctl = ioread32(I2C_REG_CTL(alg_data)); in i2c_pnx_interrupt()
[all …]
/drivers/net/wan/lmc/
Dlmc_media.c193 lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) in lmc_hssi_set_status() argument
195 if (ctl == NULL) in lmc_hssi_set_status()
206 if (ctl->clock_source && !sc->ictl.clock_source) in lmc_hssi_set_status()
211 else if (!ctl->clock_source && sc->ictl.clock_source) in lmc_hssi_set_status()
217 lmc_set_protocol (sc, ctl); in lmc_hssi_set_status()
338 lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl) in lmc_ds3_set_status() argument
340 if (ctl == NULL) in lmc_ds3_set_status()
352 if (ctl->cable_length && !sc->ictl.cable_length) in lmc_ds3_set_status()
354 else if (!ctl->cable_length && sc->ictl.cable_length) in lmc_ds3_set_status()
360 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff) in lmc_ds3_set_status()
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/drivers/net/wireless/broadcom/b43legacy/
Dleds.c39 u16 ctl; in b43legacy_led_turn_on() local
42 ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL); in b43legacy_led_turn_on()
44 ctl &= ~(1 << led_index); in b43legacy_led_turn_on()
46 ctl |= (1 << led_index); in b43legacy_led_turn_on()
47 b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl); in b43legacy_led_turn_on()
56 u16 ctl; in b43legacy_led_turn_off() local
59 ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL); in b43legacy_led_turn_off()
61 ctl |= (1 << led_index); in b43legacy_led_turn_off()
63 ctl &= ~(1 << led_index); in b43legacy_led_turn_off()
64 b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl); in b43legacy_led_turn_off()
/drivers/net/ethernet/apm/xgene/
Dxgene_enet_sgmac.c57 static bool xgene_enet_wr_indirect(struct xgene_indirect_ctl *ctl, in xgene_enet_wr_indirect() argument
62 iowrite32(wr_addr, ctl->addr); in xgene_enet_wr_indirect()
63 iowrite32(wr_data, ctl->ctl); in xgene_enet_wr_indirect()
64 iowrite32(XGENE_ENET_WR_CMD, ctl->cmd); in xgene_enet_wr_indirect()
68 if (ioread32(ctl->cmd_done)) { in xgene_enet_wr_indirect()
69 iowrite32(0, ctl->cmd); in xgene_enet_wr_indirect()
81 struct xgene_indirect_ctl ctl = { in xgene_enet_wr_mac() local
83 .ctl = p->mcx_mac_addr + MAC_WRITE_REG_OFFSET, in xgene_enet_wr_mac()
88 if (!xgene_enet_wr_indirect(&ctl, wr_addr, wr_data)) in xgene_enet_wr_mac()
107 static u32 xgene_enet_rd_indirect(struct xgene_indirect_ctl *ctl, u32 rd_addr) in xgene_enet_rd_indirect() argument
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