Searched refs:ctrl_pol (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/msm/mdp/mdp4/ |
| D | mdp4_dsi_encoder.c | 55 uint32_t dsi_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp4_dsi_encoder_mode_set() local
70 ctrl_pol = 0; in mdp4_dsi_encoder_mode_set()
72 ctrl_pol |= MDP4_DSI_CTRL_POLARITY_HSYNC_LOW; in mdp4_dsi_encoder_mode_set()
74 ctrl_pol |= MDP4_DSI_CTRL_POLARITY_VSYNC_LOW; in mdp4_dsi_encoder_mode_set()
98 mdp4_write(mdp4_kms, REG_MDP4_DSI_CTRL_POLARITY, ctrl_pol); in mdp4_dsi_encoder_mode_set()
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| D | mdp4_dtv_encoder.c | 102 uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp4_dtv_encoder_mode_set() local
121 ctrl_pol = 0; in mdp4_dtv_encoder_mode_set()
123 ctrl_pol |= MDP4_DTV_CTRL_POLARITY_HSYNC_LOW; in mdp4_dtv_encoder_mode_set()
125 ctrl_pol |= MDP4_DTV_CTRL_POLARITY_VSYNC_LOW; in mdp4_dtv_encoder_mode_set()
153 mdp4_write(mdp4_kms, REG_MDP4_DTV_CTRL_POLARITY, ctrl_pol); in mdp4_dtv_encoder_mode_set()
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| D | mdp4_lcdc_encoder.c | 270 uint32_t lcdc_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp4_lcdc_encoder_mode_set() local
289 ctrl_pol = 0; in mdp4_lcdc_encoder_mode_set()
291 ctrl_pol |= MDP4_LCDC_CTRL_POLARITY_HSYNC_LOW; in mdp4_lcdc_encoder_mode_set()
293 ctrl_pol |= MDP4_LCDC_CTRL_POLARITY_VSYNC_LOW; in mdp4_lcdc_encoder_mode_set()
321 mdp4_write(mdp4_kms, REG_MDP4_LCDC_CTRL_POLARITY, ctrl_pol); in mdp4_lcdc_encoder_mode_set()
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| /drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5_encoder.c | 124 uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol; in mdp5_encoder_mode_set() local
141 ctrl_pol = 0; in mdp5_encoder_mode_set()
146 ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW; in mdp5_encoder_mode_set()
148 ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW; in mdp5_encoder_mode_set()
209 mdp5_write(mdp5_kms, REG_MDP5_INTF_POLARITY_CTL(intf), ctrl_pol); in mdp5_encoder_mode_set()
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