Searched refs:dpm_level (Results 1 – 7 of 7) sorted by relevance
405 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table()416 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry()417 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry()418 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry()429 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value()501 if (value == dpm_table->dpm_level[i].value) { in phm_find_boot_level()
304 uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug);
612 uint16_t dpm_level, in atomctrl_calculate_voltage_evv_on_sclk() argument661 switch (dpm_level) { in atomctrl_calculate_voltage_evv_on_sclk()
1324 hwmgr->dpm_level = level; in cz_dpm_force_dpm_level()1648 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in cz_force_clock_level()
2488 hwmgr->dpm_level = level; in smu7_force_dpm_level()4019 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu7_force_clock_level()
65 struct vi_dpm_level dpm_level[1]; member626 enum amd_dpm_forced_level dpm_level; member
346 return (((struct pp_instance *)handle)->hwmgr->dpm_level); in pp_dpm_get_performance_level()