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Searched refs:dpm_levels (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu7_hwmgr.c683 if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
685 data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value = in smu7_setup_dpm_tables_v0()
687 …data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled = 1; /*(i==0) ? 1 … in smu7_setup_dpm_tables_v0()
697 if (i == 0 || data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count-1].value != in smu7_setup_dpm_tables_v0()
699 data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value = in smu7_setup_dpm_tables_v0()
701 …data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled = 1; /*(i==0) ? 1 … in smu7_setup_dpm_tables_v0()
708 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
709 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; in smu7_setup_dpm_tables_v0()
711 data->dpm_table.vddc_table.dpm_levels[i].enabled = 1; in smu7_setup_dpm_tables_v0()
720 data->dpm_table.vddci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
[all …]
Dsmu7_hwmgr.h105 struct smu7_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
/drivers/gpu/drm/amd/amdgpu/
Dci_dpm.c2667 pi->dpm_table.sclk_table.dpm_levels[i].value, in ci_do_program_memory_timing_parameters()
2668 pi->dpm_table.mclk_table.dpm_levels[j].value, in ci_do_program_memory_timing_parameters()
2726 if (dpm_table->dpm_levels[i-1].enabled) in ci_get_dpm_level_enable_mask_value()
2744 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
2746 amdgpu_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
3406 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels()
3452 if (dpm_table->mclk_table.dpm_levels[i].value == 0) in ci_populate_all_memory_levels()
3455 dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
3497 dpm_table->dpm_levels[i].enabled = false; in ci_reset_single_dpm_table()
3503 dpm_table->dpm_levels[index].value = pcie_gen; in ci_setup_pcie_table_entry()
[all …]
Dci_dpm.h65 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
/drivers/gpu/drm/radeon/
Dci_dpm.c2540 pi->dpm_table.sclk_table.dpm_levels[i].value, in ci_do_program_memory_timing_parameters()
2541 pi->dpm_table.mclk_table.dpm_levels[j].value, in ci_do_program_memory_timing_parameters()
2599 if (dpm_table->dpm_levels[i-1].enabled) in ci_get_dpm_level_enable_mask_value()
2617 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
2619 r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
3273 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels()
3319 if (dpm_table->mclk_table.dpm_levels[i].value == 0) in ci_populate_all_memory_levels()
3322 dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
3364 dpm_table->dpm_levels[i].enabled = false; in ci_reset_single_dpm_table()
3370 dpm_table->dpm_levels[index].value = pcie_gen; in ci_setup_pcie_table_entry()
[all …]
Dci_dpm.h64 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER]; member
/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smc.c596 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in fiji_populate_smc_link_level()
598 dpm_table->pcie_speed_table.dpm_levels[i].param1); in fiji_populate_smc_link_level()
799 dpm_table->sclk_table.dpm_levels[i].value, in fiji_populate_all_graphic_levels()
1016 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in fiji_populate_all_memory_levels()
1020 dpm_table->mclk_table.dpm_levels[i].value, in fiji_populate_all_memory_levels()
1105 data->dpm_table.sclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1163 data->dpm_table.mclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1184 data->dpm_table.mclk_table.dpm_levels[0].value, in fiji_populate_smc_acpi_level()
1363 data->dpm_table.sclk_table.dpm_levels[i].value, in fiji_program_memory_timing_parameters()
1364 data->dpm_table.mclk_table.dpm_levels[j].value, in fiji_program_memory_timing_parameters()
Dpolaris10_smc.c532 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in polaris10_populate_smc_link_level()
534 dpm_table->pcie_speed_table.dpm_levels[i].param1); in polaris10_populate_smc_link_level()
776 dpm_table->sclk_table.dpm_levels[i].value, in polaris10_populate_all_graphic_levels()
914 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in polaris10_populate_all_memory_levels()
918 dpm_table->mclk_table.dpm_levels[i].value, in polaris10_populate_all_memory_levels()
1047 data->dpm_table.mclk_table.dpm_levels[0].value, in polaris10_populate_smc_acpi_level()
1210 hw_data->dpm_table.sclk_table.dpm_levels[i].value, in polaris10_program_memory_timing_parameters()
1211 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in polaris10_program_memory_timing_parameters()
1214 result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j); in polaris10_program_memory_timing_parameters()
Diceland_smc.c610 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in iceland_populate_smc_link_level()
612 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in iceland_populate_smc_link_level()
839 dpm_table->sclk_table.dpm_levels[i].value, in iceland_populate_all_graphic_levels()
1234 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels()
1236 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1509 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters()
1510 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters()
1652 data->dpm_table.mclk_table.dpm_levels[i].value, in iceland_convert_mc_reg_table_to_smc()
Dtonga_smc.c415 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in tonga_populate_smc_link_level()
417 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in tonga_populate_smc_link_level()
624 dpm_table->sclk_table.dpm_levels[i].value, in tonga_populate_all_graphic_levels()
1023 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in tonga_populate_all_memory_levels()
1028 dpm_table->mclk_table.dpm_levels[i].value, in tonga_populate_all_memory_levels()
1467 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in tonga_program_memory_timing_parameters()
1468 data->dpm_table.mclk_table.dpm_levels[j].value, in tonga_program_memory_timing_parameters()
2143 data->dpm_table.mclk_table.dpm_levels[i].value, in tonga_convert_mc_reg_table_to_smc()