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Searched refs:dst_h (Results 1 – 20 of 20) sorted by relevance

/drivers/media/platform/ti-vpe/
Dsc.c114 unsigned int dst_h) in sc_set_vs_coeffs() argument
122 if (dst_h > src_h) { in sc_set_vs_coeffs()
124 } else if (dst_h == src_h) { in sc_set_vs_coeffs()
127 sixteenths = (dst_h << 4) / src_h; in sc_set_vs_coeffs()
155 unsigned int dst_w, unsigned int dst_h) in sc_config_scaler() argument
184 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
219 if (dst_h < (src_h >> 2)) { in sc_config_scaler()
228 factor = (u16) ((dst_h << 10) / src_h); in sc_config_scaler()
244 src_h, dst_h, factor, row_acc_init_rav, in sc_config_scaler()
248 row_acc_inc = ((src_h - 1) << 16) / (dst_h - 1); in sc_config_scaler()
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Dsc.h202 unsigned int dst_h);
205 unsigned int dst_w, unsigned int dst_h);
Dvpe.c813 unsigned int dst_h = d_q_data->c_rect.height; in set_srcdst_params() local
857 sc_set_vs_coeffs(ctx->dev->sc, ctx->sc_coeff_v.addr, src_h, dst_h); in set_srcdst_params()
861 src_w, src_h, dst_w, dst_h); in set_srcdst_params()
/drivers/media/pci/ivtv/
Divtv-yuv.c407 f->tru_h, f->src_h, f->dst_h, f->src_y, f->dst_y); in ivtv_yuv_handle_vertical()
437 reg_2918 = (f->dst_h << 16) | (f->src_h + src_minor_y); in ivtv_yuv_handle_vertical()
439 reg_2918 = (f->dst_h << 16) | ((f->src_h + src_minor_y) << 1); in ivtv_yuv_handle_vertical()
442 reg_291c = (f->dst_h << 16) | ((f->src_h + src_minor_uv) >> 1); in ivtv_yuv_handle_vertical()
444 reg_291c = (f->dst_h << 16) | (f->src_h + src_minor_uv); in ivtv_yuv_handle_vertical()
446 reg_2964_base = (src_minor_y * ((f->dst_h << 16) / f->src_h)) >> 14; in ivtv_yuv_handle_vertical()
447 reg_2968_base = (src_minor_uv * ((f->dst_h << 16) / f->src_h)) >> 14; in ivtv_yuv_handle_vertical()
449 if (f->dst_h / 2 >= f->src_h && !f->interlaced_y) { in ivtv_yuv_handle_vertical()
450 master_height = (f->src_h * 0x00400000) / f->dst_h; in ivtv_yuv_handle_vertical()
451 if ((f->src_h * 0x00400000) - (master_height * f->dst_h) >= f->dst_h / 2) in ivtv_yuv_handle_vertical()
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Divtv-driver.h403 u32 dst_h; member
/drivers/gpu/drm/sti/
Dsti_hqvdp.c472 int src_w, src_h, dst_w, dst_h; in hqvdp_dbg_dump_cmd() local
512 dst_h = c->hvsrc.output_picture_size >> 16; in hqvdp_dbg_dump_cmd()
513 seq_printf(s, "\t%dx%d", dst_w, dst_h); in hqvdp_dbg_dump_cmd()
532 if (dst_h > src_h) in hqvdp_dbg_dump_cmd()
533 seq_printf(s, " %d/1", dst_h / src_h); in hqvdp_dbg_dump_cmd()
535 seq_printf(s, " 1/%d", src_h / dst_h); in hqvdp_dbg_dump_cmd()
728 int dst_w, int dst_h) in sti_hqvdp_check_hw_scaling() argument
736 inv_zy = DIV_ROUND_UP(src_h, dst_h); in sti_hqvdp_check_hw_scaling()
1019 int dst_x, dst_y, dst_w, dst_h; in sti_hqvdp_atomic_check() local
1031 dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); in sti_hqvdp_atomic_check()
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Dsti_vid.c146 int dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); in sti_vid_commit() local
153 dst_h = ALIGN(dst_h, 2); in sti_vid_commit()
161 yds = sti_vtg_get_line_number(*mode, dst_y + dst_h - 1); in sti_vid_commit()
Dsti_gdp.c620 int dst_x, dst_y, dst_w, dst_h; in sti_gdp_atomic_check() local
634 dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); in sti_gdp_atomic_check()
699 dst_w, dst_h, dst_x, dst_y, in sti_gdp_atomic_check()
714 int dst_x, dst_y, dst_w, dst_h; in sti_gdp_atomic_update() local
733 dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); in sti_gdp_atomic_update()
769 dst_h = sti_gdp_get_dst(gdp->dev, dst_h, src_h); in sti_gdp_atomic_update()
771 yds = sti_vtg_get_line_number(*mode, dst_y + dst_h - 1); in sti_gdp_atomic_update()
Dsti_cursor.c191 int dst_x, dst_y, dst_w, dst_h; in sti_cursor_atomic_check() local
203 dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y); in sti_cursor_atomic_check()
248 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y); in sti_cursor_atomic_check()
/drivers/gpu/drm/
Ddrm_rect.c163 int dst_h = drm_rect_height(dst); in drm_rect_calc_vscale() local
164 int vscale = drm_calc_scale(src_h, dst_h); in drm_rect_calc_vscale()
166 if (vscale < 0 || dst_h == 0) in drm_rect_calc_vscale()
250 int dst_h = drm_rect_height(dst); in drm_rect_calc_vscale_relaxed() local
251 int vscale = drm_calc_scale(src_h, dst_h); in drm_rect_calc_vscale_relaxed()
253 if (vscale < 0 || dst_h == 0) in drm_rect_calc_vscale_relaxed()
259 drm_rect_adjust_size(dst, 0, max_dst_h - dst_h); in drm_rect_calc_vscale_relaxed()
265 int max_src_h = dst_h * max_vscale; in drm_rect_calc_vscale_relaxed()
/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.h266 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h, in scl_get_bili_dn_vskip() argument
273 return GET_SCL_FT_BILI_DN(act_height, dst_h); in scl_get_bili_dn_vskip()
Drockchip_drm_vop.c302 uint32_t dst_h, uint32_t pixel_format) in scl_vop_cal_scl_fac() argument
326 scl_cal_scale2(src_h, dst_h)); in scl_vop_cal_scl_fac()
331 scl_cal_scale2(cbcr_src_h, dst_h)); in scl_vop_cal_scl_fac()
337 yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h); in scl_vop_cal_scl_fac()
341 cbcr_ver_scl_mode = scl_get_scl_mode(cbcr_src_h, dst_h); in scl_vop_cal_scl_fac()
373 val = scl_vop_cal_scale(yrgb_ver_scl_mode, src_h, dst_h, in scl_vop_cal_scl_fac()
390 dst_h, false, vsu_mode, &vskiplines); in scl_vop_cal_scl_fac()
/drivers/media/platform/sti/bdisp/
Dbdisp-hw.c630 u32 src_w, src_h, dst_w, dst_h; in bdisp_hw_get_hv_inc() local
635 dst_h = ctx->dst.crop.height; in bdisp_hw_get_hv_inc()
638 bdisp_hw_get_inc(src_h, dst_h, v_inc)) { in bdisp_hw_get_hv_inc()
641 src_w, src_h, dst_w, dst_h); in bdisp_hw_get_hv_inc()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_display.c671 u32 src_h = 1, dst_h = 1; in amdgpu_crtc_scaling_mode_fixup() local
698 dst_h = amdgpu_crtc->native_mode.hdisplay; in amdgpu_crtc_scaling_mode_fixup()
718 dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); in amdgpu_crtc_scaling_mode_fixup()
727 b.full = dfixed_const(dst_h); in amdgpu_crtc_scaling_mode_fixup()
/drivers/gpu/drm/i915/
Dintel_overlay.c506 short dst_h; member
642 if (params->dst_h > 1) in update_scaling_factors()
644 /(params->dst_h); in update_scaling_factors()
820 iowrite32((params->dst_h << 16) | params->dst_w, &regs->DWINSZ); in intel_overlay_do_put_image()
957 tmp = ((rec->src_scan_h << 16) / rec->dst_h) >> 16; in check_overlay_scaling()
1195 params->dst_h = ((((u32)put_image_rec->dst_height) << 12) / in intel_overlay_put_image_ioctl()
1199 params->dst_h = put_image_rec->dst_height; in intel_overlay_put_image_ioctl()
Dintel_display.c3402 int dst_h = drm_rect_height(&plane_state->base.dst); in skylake_update_primary_plane() local
3417 dst_h--; in skylake_update_primary_plane()
3435 WARN_ON(!dst_w || !dst_h); in skylake_update_primary_plane()
3441 I915_WRITE(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h); in skylake_update_primary_plane()
4666 int src_w, int src_h, int dst_w, int dst_h) in skl_update_scaler() argument
4675 (src_h != dst_w || src_w != dst_h): in skl_update_scaler()
4676 (src_w != dst_w || src_h != dst_h); in skl_update_scaler()
4704 dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H || in skl_update_scaler()
4707 dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H) { in skl_update_scaler()
4710 intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h); in skl_update_scaler()
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Dintel_pm.c3175 uint32_t src_w, src_h, dst_w, dst_h; in skl_plane_downscale_amount() local
3184 dst_h = drm_rect_height(&pstate->base.dst); in skl_plane_downscale_amount()
3186 swap(dst_w, dst_h); in skl_plane_downscale_amount()
3188 downscale_h = max(src_h / dst_h, (uint32_t)DRM_PLANE_HELPER_NO_SCALING); in skl_plane_downscale_amount()
/drivers/gpu/drm/exynos/
Dexynos_drm_gsc.c926 u32 src_w, src_h, dst_w, dst_h; in gsc_set_prescaler() local
934 dst_h = dst->w; in gsc_set_prescaler()
937 dst_h = dst->h; in gsc_set_prescaler()
946 ret = gsc_get_ratio_shift(src_h, dst_h, &sc->pre_vratio); in gsc_set_prescaler()
956 sc->main_vratio = (src_h << 16) / dst_h; in gsc_set_prescaler()
Dexynos_drm_fimc.c923 u32 src_w, src_h, dst_w, dst_h; in fimc_set_prescaler() local
936 dst_h = dst->w; in fimc_set_prescaler()
939 dst_h = dst->h; in fimc_set_prescaler()
949 vfactor = fls(src_h / dst_h / 2); in fimc_set_prescaler()
962 sc->vratio = (src_h << 14) / (dst_h << vfactor); in fimc_set_prescaler()
964 sc->up_v = (dst_h >= src_h) ? true : false; in fimc_set_prescaler()
/drivers/gpu/drm/radeon/
Dradeon_display.c1725 u32 src_h = 1, dst_h = 1; in radeon_crtc_scaling_mode_fixup() local
1753 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup()
1774 dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); in radeon_crtc_scaling_mode_fixup()
1796 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()