| /drivers/media/platform/ti-vpe/ |
| D | sc.c | 61 unsigned int dst_w) in sc_set_hs_coeffs() argument
69 if (dst_w > src_w) { in sc_set_hs_coeffs()
72 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
73 dst_w <<= 1; /* first level decimation */ in sc_set_hs_coeffs()
74 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
75 dst_w <<= 1; /* second level decimation */ in sc_set_hs_coeffs()
77 if (dst_w == src_w) { in sc_set_hs_coeffs()
80 sixteenths = (dst_w << 4) / src_w; in sc_set_hs_coeffs()
155 unsigned int dst_w, unsigned int dst_h) in sc_config_scaler() argument
184 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
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| D | sc.h | 200 unsigned int dst_w);
205 unsigned int dst_w, unsigned int dst_h);
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| D | vpe.c | 812 unsigned int dst_w = d_q_data->c_rect.width; in set_srcdst_params() local
856 sc_set_hs_coeffs(ctx->dev->sc, ctx->sc_coeff_h.addr, src_w, dst_w); in set_srcdst_params()
861 src_w, src_h, dst_w, dst_h); in set_srcdst_params()
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| /drivers/media/pci/ivtv/ |
| D | ivtv-yuv.c | 241 f->tru_w, f->src_w, f->dst_w, f->src_x, f->dst_x); in ivtv_yuv_handle_horizontal()
247 reg_2834 = f->dst_w; in ivtv_yuv_handle_horizontal()
263 if ((f->tru_x - f->pan_x > -1) && (f->tru_x - f->pan_x <= 40) && (f->dst_w >= 680)) in ivtv_yuv_handle_horizontal()
265 else if ((f->tru_x - f->pan_x < 0) && (f->tru_x - f->pan_x >= -20) && (f->dst_w >= 660)) in ivtv_yuv_handle_horizontal()
268 if (f->dst_w >= f->src_w) in ivtv_yuv_handle_horizontal()
274 if (f->dst_w < f->src_w) in ivtv_yuv_handle_horizontal()
280 reg_2870_offset = (f->src_x * ((f->dst_w << 21) / f->src_w)) >> 19; in ivtv_yuv_handle_horizontal()
282 if (f->dst_w >= f->src_w) { in ivtv_yuv_handle_horizontal()
284 master_width = (f->src_w * 0x00200000) / (f->dst_w); in ivtv_yuv_handle_horizontal()
285 if (master_width * f->dst_w != f->src_w * 0x00200000) in ivtv_yuv_handle_horizontal()
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| D | ivtv-driver.h | 402 u32 dst_w; member
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| /drivers/gpu/drm/sti/ |
| D | sti_hqvdp.c | 472 int src_w, src_h, dst_w, dst_h; in hqvdp_dbg_dump_cmd() local
511 dst_w = c->hvsrc.output_picture_size & 0x0000FFFF; in hqvdp_dbg_dump_cmd()
513 seq_printf(s, "\t%dx%d", dst_w, dst_h); in hqvdp_dbg_dump_cmd()
526 if (dst_w > src_w) in hqvdp_dbg_dump_cmd()
527 seq_printf(s, " %d/1", dst_w / src_w); in hqvdp_dbg_dump_cmd()
529 seq_printf(s, " 1/%d", src_w / dst_w); in hqvdp_dbg_dump_cmd()
728 int dst_w, int dst_h) in sti_hqvdp_check_hw_scaling() argument
734 lfw /= max(src_w, dst_w) * mode->clock / 1000; in sti_hqvdp_check_hw_scaling()
1019 int dst_x, dst_y, dst_w, dst_h; in sti_hqvdp_atomic_check() local
1030 dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); in sti_hqvdp_atomic_check()
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| D | sti_vid.c | 145 int dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); in sti_vid_commit() local
152 dst_w = ALIGN(dst_w, 2); in sti_vid_commit()
163 xds = sti_vtg_get_pixel_number(*mode, dst_x + dst_w - 1); in sti_vid_commit()
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| D | sti_gdp.c | 620 int dst_x, dst_y, dst_w, dst_h; in sti_gdp_atomic_check() local
633 dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); in sti_gdp_atomic_check()
699 dst_w, dst_h, dst_x, dst_y, in sti_gdp_atomic_check()
714 int dst_x, dst_y, dst_w, dst_h; in sti_gdp_atomic_update() local
732 dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); in sti_gdp_atomic_update()
768 dst_w = sti_gdp_get_dst(gdp->dev, dst_w, src_w); in sti_gdp_atomic_update()
773 xds = sti_vtg_get_pixel_number(*mode, dst_x + dst_w - 1); in sti_gdp_atomic_update()
778 src_w = dst_w; in sti_gdp_atomic_update()
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| D | sti_cursor.c | 191 int dst_x, dst_y, dst_w, dst_h; in sti_cursor_atomic_check() local
202 dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x); in sti_cursor_atomic_check()
248 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y); in sti_cursor_atomic_check()
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| /drivers/gpu/drm/ |
| D | drm_rect.c | 132 int dst_w = drm_rect_width(dst); in drm_rect_calc_hscale() local
133 int hscale = drm_calc_scale(src_w, dst_w); in drm_rect_calc_hscale()
135 if (hscale < 0 || dst_w == 0) in drm_rect_calc_hscale()
200 int dst_w = drm_rect_width(dst); in drm_rect_calc_hscale_relaxed() local
201 int hscale = drm_calc_scale(src_w, dst_w); in drm_rect_calc_hscale_relaxed()
203 if (hscale < 0 || dst_w == 0) in drm_rect_calc_hscale_relaxed()
209 drm_rect_adjust_size(dst, max_dst_w - dst_w, 0); in drm_rect_calc_hscale_relaxed()
215 int max_src_w = dst_w * max_hscale; in drm_rect_calc_hscale_relaxed()
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| /drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_vop.c | 301 uint32_t src_w, uint32_t src_h, uint32_t dst_w, in scl_vop_cal_scl_fac() argument
317 if (dst_w > 3840) { in scl_vop_cal_scl_fac()
324 scl_cal_scale2(src_w, dst_w)); in scl_vop_cal_scl_fac()
329 scl_cal_scale2(cbcr_src_w, dst_w)); in scl_vop_cal_scl_fac()
336 yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w); in scl_vop_cal_scl_fac()
340 cbcr_hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w); in scl_vop_cal_scl_fac()
343 lb_mode = scl_vop_cal_lb_mode(dst_w, true); in scl_vop_cal_scl_fac()
348 lb_mode = scl_vop_cal_lb_mode(dst_w, false); in scl_vop_cal_scl_fac()
370 val = scl_vop_cal_scale(yrgb_hor_scl_mode, src_w, dst_w, in scl_vop_cal_scl_fac()
387 dst_w, true, 0, NULL); in scl_vop_cal_scl_fac()
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| /drivers/media/platform/sti/bdisp/ |
| D | bdisp-hw.c | 630 u32 src_w, src_h, dst_w, dst_h; in bdisp_hw_get_hv_inc() local
634 dst_w = ctx->dst.crop.width; in bdisp_hw_get_hv_inc()
637 if (bdisp_hw_get_inc(src_w, dst_w, h_inc) || in bdisp_hw_get_hv_inc()
641 src_w, src_h, dst_w, dst_h); in bdisp_hw_get_hv_inc()
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| /drivers/gpu/drm/i915/ |
| D | intel_overlay.c | 505 short dst_w; member
636 if (params->dst_w > 1) in update_scaling_factors()
638 /(params->dst_w); in update_scaling_factors()
820 iowrite32((params->dst_h << 16) | params->dst_w, ®s->DWINSZ); in intel_overlay_do_put_image()
960 tmp = ((rec->src_scan_w << 16) / rec->dst_w) >> 16; in check_overlay_scaling()
1202 params->dst_w = put_image_rec->dst_width; in intel_overlay_put_image_ioctl()
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| D | intel_display.c | 3401 int dst_w = drm_rect_width(&plane_state->base.dst); in skylake_update_primary_plane() local
3416 dst_w--; in skylake_update_primary_plane()
3435 WARN_ON(!dst_w || !dst_h); in skylake_update_primary_plane()
3441 I915_WRITE(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h); in skylake_update_primary_plane()
4666 int src_w, int src_h, int dst_w, int dst_h) in skl_update_scaler() argument
4675 (src_h != dst_w || src_w != dst_h): in skl_update_scaler()
4676 (src_w != dst_w || src_h != dst_h); in skl_update_scaler()
4704 dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H || in skl_update_scaler()
4707 dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H) { in skl_update_scaler()
4710 intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h); in skl_update_scaler()
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| D | intel_pm.c | 3175 uint32_t src_w, src_h, dst_w, dst_h; in skl_plane_downscale_amount() local
3183 dst_w = drm_rect_width(&pstate->base.dst); in skl_plane_downscale_amount()
3186 swap(dst_w, dst_h); in skl_plane_downscale_amount()
3189 downscale_w = max(src_w / dst_w, (uint32_t)DRM_PLANE_HELPER_NO_SCALING); in skl_plane_downscale_amount()
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| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_gsc.c | 926 u32 src_w, src_h, dst_w, dst_h; in gsc_set_prescaler() local
933 dst_w = dst->h; in gsc_set_prescaler()
936 dst_w = dst->w; in gsc_set_prescaler()
940 ret = gsc_get_ratio_shift(src_w, dst_w, &sc->pre_hratio); in gsc_set_prescaler()
955 sc->main_hratio = (src_w << 16) / dst_w; in gsc_set_prescaler()
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| D | exynos_drm_fimc.c | 923 u32 src_w, src_h, dst_w, dst_h; in fimc_set_prescaler() local
935 dst_w = dst->h; in fimc_set_prescaler()
938 dst_w = dst->w; in fimc_set_prescaler()
943 hfactor = fls(src_w / dst_w / 2); in fimc_set_prescaler()
961 sc->hratio = (src_w << 14) / (dst_w << hfactor); in fimc_set_prescaler()
963 sc->up_h = (dst_w >= src_w) ? true : false; in fimc_set_prescaler()
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