Searched refs:enabled_irqs (Results 1 – 4 of 4) sorted by relevance
| /drivers/i2c/busses/ |
| D | i2c-uniphier-f.c | 96 u32 enabled_irqs; member
141 writel(priv->enabled_irqs, priv->membase + UNIPHIER_FI2C_IE); in uniphier_fi2c_set_irqs()
153 priv->enabled_irqs |= UNIPHIER_FI2C_INT_STOP; in uniphier_fi2c_stop()
168 priv->enabled_irqs, irq_status); in uniphier_fi2c_interrupt()
217 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RB; in uniphier_fi2c_interrupt()
240 priv->enabled_irqs = 0; in uniphier_fi2c_interrupt()
253 priv->enabled_irqs |= UNIPHIER_FI2C_INT_TE; in uniphier_fi2c_tx_init()
273 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF | in uniphier_fi2c_rx_init()
283 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF; in uniphier_fi2c_rx_init()
320 priv->enabled_irqs = UNIPHIER_FI2C_INT_FAULTS; in uniphier_fi2c_master_xfer_one()
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| /drivers/gpu/drm/i915/ |
| D | i915_irq.c | 3382 u32 enabled_irqs = 0; in intel_hpd_enabled_irqs() local
3386 enabled_irqs |= hpd[encoder->hpd_pin]; in intel_hpd_enabled_irqs()
3388 return enabled_irqs; in intel_hpd_enabled_irqs()
3393 u32 hotplug_irqs, hotplug, enabled_irqs; in ibx_hpd_irq_setup() local
3397 enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_ibx); in ibx_hpd_irq_setup()
3400 enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_cpt); in ibx_hpd_irq_setup()
3403 ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs); in ibx_hpd_irq_setup()
3426 u32 hotplug_irqs, hotplug, enabled_irqs; in spt_hpd_irq_setup() local
3429 enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_spt); in spt_hpd_irq_setup()
3431 ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs); in spt_hpd_irq_setup()
[all …]
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| /drivers/gpio/ |
| D | gpio-dln2.c | 63 DECLARE_BITMAP(enabled_irqs, DLN2_GPIO_MAX_PINS);
366 enabled = test_bit(pin, dln2->enabled_irqs); in dln2_irq_bus_unlock()
372 set_bit(pin, dln2->enabled_irqs); in dln2_irq_bus_unlock()
375 clear_bit(pin, dln2->enabled_irqs); in dln2_irq_bus_unlock()
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| /drivers/pinctrl/qcom/ |
| D | pinctrl-msm.c | 67 DECLARE_BITMAP(enabled_irqs, MAX_NR_GPIO);
580 clear_bit(d->hwirq, pctrl->enabled_irqs); in msm_gpio_irq_mask()
601 set_bit(d->hwirq, pctrl->enabled_irqs); in msm_gpio_irq_unmask()
766 for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { in msm_gpio_irq_handler()
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