Searched refs:flush_mask (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5_ctl.c | 440 static u32 fix_sw_flush(struct mdp5_ctl *ctl, u32 flush_mask) in fix_sw_flush() argument
445 (!(ctl_mgr->flush_hw_mask & bit) && (flush_mask & bit)) in fix_sw_flush()
454 static void fix_for_single_flush(struct mdp5_ctl *ctl, u32 *flush_mask, in fix_for_single_flush() argument
460 DBG("CTL %d FLUSH pending mask %x", ctl->id, *flush_mask); in fix_for_single_flush()
462 ctl_mgr->single_flush_pending_mask |= (*flush_mask); in fix_for_single_flush()
463 *flush_mask = 0; in fix_for_single_flush()
467 *flush_mask = ctl_mgr->single_flush_pending_mask; in fix_for_single_flush()
473 DBG("Single FLUSH mask %x,ID %d", *flush_mask, in fix_for_single_flush()
495 u32 mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask) in mdp5_ctl_commit() argument
503 pipeline->start_mask &= ~flush_mask; in mdp5_ctl_commit()
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| D | mdp5_crtc.c | 101 static u32 crtc_flush(struct drm_crtc *crtc, u32 flush_mask) in crtc_flush() argument
105 DBG("%s: flush=%08x", mdp5_crtc->name, flush_mask); in crtc_flush()
106 return mdp5_ctl_commit(mdp5_crtc->ctl, flush_mask); in crtc_flush()
118 uint32_t flush_mask = 0; in crtc_flush_all() local
125 flush_mask |= mdp5_plane_get_flush(plane); in crtc_flush_all()
128 flush_mask |= mdp_ctl_flush_mask_lm(mdp5_crtc->lm); in crtc_flush_all()
130 return crtc_flush(crtc, flush_mask); in crtc_flush_all()
505 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); in mdp5_crtc_cursor_set() local
569 crtc_flush(crtc, flush_mask); in mdp5_crtc_cursor_set()
584 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); in mdp5_crtc_cursor_move() local
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| D | mdp5_ctl.h | 74 u32 mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask);
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| D | mdp5_plane.c | 31 uint32_t flush_mask; /* used to commit pipe registers */ member
855 return mdp5_plane->flush_mask; in mdp5_plane_get_flush()
898 mdp5_plane->flush_mask = mdp_ctl_flush_mask_pipe(pipe); in mdp5_plane_init()
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