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/drivers/scsi/qla4xxx/
Dql4_init.c14 static void ql4xxx_set_mac_number(struct scsi_qla_host *ha) in ql4xxx_set_mac_number() argument
21 spin_lock_irqsave(&ha->hardware_lock, flags); in ql4xxx_set_mac_number()
22 value = readw(&ha->reg->ctrl_status); in ql4xxx_set_mac_number()
23 spin_unlock_irqrestore(&ha->hardware_lock, flags); in ql4xxx_set_mac_number()
28 ha->mac_index = 1; in ql4xxx_set_mac_number()
31 ha->mac_index = 3; in ql4xxx_set_mac_number()
35 "ispControlStatus = 0x%x\n", ha->host_no, in ql4xxx_set_mac_number()
39 DEBUG2(printk("scsi%ld: %s: mac_index %d.\n", ha->host_no, __func__, in ql4xxx_set_mac_number()
40 ha->mac_index)); in ql4xxx_set_mac_number()
50 void qla4xxx_free_ddb(struct scsi_qla_host *ha, in qla4xxx_free_ddb() argument
[all …]
Dql4_isr.c19 static void qla4xxx_copy_sense(struct scsi_qla_host *ha, in qla4xxx_copy_sense() argument
29 DEBUG2(ql4_printk(KERN_INFO, ha, "scsi%ld:%d:%d:%llu: %s:" in qla4xxx_copy_sense()
30 " sense len 0\n", ha->host_no, in qla4xxx_copy_sense()
33 ha->status_srb = NULL; in qla4xxx_copy_sense()
47 "ASL= %02x, ASC/ASCQ = %02x/%02x\n", ha->host_no, in qla4xxx_copy_sense()
62 ha->status_srb = srb; in qla4xxx_copy_sense()
64 ha->status_srb = NULL; in qla4xxx_copy_sense()
75 qla4xxx_status_cont_entry(struct scsi_qla_host *ha, in qla4xxx_status_cont_entry() argument
78 struct srb *srb = ha->status_srb; in qla4xxx_status_cont_entry()
88 "back to OS srb=%p srb->state:%d\n", ha->host_no, in qla4xxx_status_cont_entry()
[all …]
Dql4_83xx.c16 uint32_t qla4_83xx_rd_reg(struct scsi_qla_host *ha, ulong addr) in qla4_83xx_rd_reg() argument
18 return readl((void __iomem *)(ha->nx_pcibase + addr)); in qla4_83xx_rd_reg()
21 void qla4_83xx_wr_reg(struct scsi_qla_host *ha, ulong addr, uint32_t val) in qla4_83xx_wr_reg() argument
23 writel(val, (void __iomem *)(ha->nx_pcibase + addr)); in qla4_83xx_wr_reg()
26 static int qla4_83xx_set_win_base(struct scsi_qla_host *ha, uint32_t addr) in qla4_83xx_set_win_base() argument
31 qla4_83xx_wr_reg(ha, QLA83XX_CRB_WIN_FUNC(ha->func_num), addr); in qla4_83xx_set_win_base()
32 val = qla4_83xx_rd_reg(ha, QLA83XX_CRB_WIN_FUNC(ha->func_num)); in qla4_83xx_set_win_base()
34 ql4_printk(KERN_ERR, ha, "%s: Failed to set register window : addr written 0x%x, read 0x%x!\n", in qla4_83xx_set_win_base()
42 int qla4_83xx_rd_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, in qla4_83xx_rd_reg_indirect() argument
47 ret_val = qla4_83xx_set_win_base(ha, addr); in qla4_83xx_rd_reg_indirect()
[all …]
Dql4_glbl.h13 int qla4xxx_hw_reset(struct scsi_qla_host *ha);
15 int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb);
16 int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset);
17 int qla4xxx_soft_reset(struct scsi_qla_host *ha);
20 void qla4xxx_free_ddb(struct scsi_qla_host *ha, struct ddb_entry *ddb_entry);
21 void qla4xxx_process_aen(struct scsi_qla_host *ha, uint8_t process_aen);
23 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host *ha);
24 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb);
25 int qla4xxx_reset_lun(struct scsi_qla_host *ha, struct ddb_entry *ddb_entry,
27 int qla4xxx_reset_target(struct scsi_qla_host *ha,
[all …]
Dql4_nx.c39 qla4_8xxx_pci_base_offsetfset(struct scsi_qla_host *ha, unsigned long off) in qla4_8xxx_pci_base_offsetfset() argument
41 if ((off < ha->first_page_group_end) && in qla4_8xxx_pci_base_offsetfset()
42 (off >= ha->first_page_group_start)) in qla4_8xxx_pci_base_offsetfset()
43 return (void __iomem *)(ha->nx_pcibase + off); in qla4_8xxx_pci_base_offsetfset()
358 qla4_82xx_pci_set_crbwindow_2M(struct scsi_qla_host *ha, ulong *off) in qla4_82xx_pci_set_crbwindow_2M() argument
362 ha->crb_win = CRB_HI(*off); in qla4_82xx_pci_set_crbwindow_2M()
363 writel(ha->crb_win, in qla4_82xx_pci_set_crbwindow_2M()
364 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
368 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
369 if (win_read != ha->crb_win) { in qla4_82xx_pci_set_crbwindow_2M()
[all …]
Dql4_nvram.c13 static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha) in eeprom_cmd() argument
15 writel(cmd, isp_nvram(ha)); in eeprom_cmd()
16 readl(isp_nvram(ha)); in eeprom_cmd()
20 static inline int eeprom_size(struct scsi_qla_host *ha) in eeprom_size() argument
22 return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16; in eeprom_size()
25 static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha) in eeprom_no_addr_bits() argument
27 return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 : in eeprom_no_addr_bits()
31 static inline int eeprom_no_data_bits(struct scsi_qla_host *ha) in eeprom_no_data_bits() argument
36 static int fm93c56a_select(struct scsi_qla_host * ha) in fm93c56a_select() argument
40 ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000; in fm93c56a_select()
[all …]
Dql4_mbx.c15 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, in qla4xxx_queue_mbox_cmd() argument
22 writel(mbx_cmd[i], &ha->reg->mailbox[i]); in qla4xxx_queue_mbox_cmd()
25 writel(mbx_cmd[0], &ha->reg->mailbox[0]); in qla4xxx_queue_mbox_cmd()
26 readl(&ha->reg->mailbox[0]); in qla4xxx_queue_mbox_cmd()
27 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status); in qla4xxx_queue_mbox_cmd()
28 readl(&ha->reg->ctrl_status); in qla4xxx_queue_mbox_cmd()
31 void qla4xxx_process_mbox_intr(struct scsi_qla_host *ha, int out_count) in qla4xxx_process_mbox_intr() argument
35 intr_status = readl(&ha->reg->ctrl_status); in qla4xxx_process_mbox_intr()
42 ha->mbox_status_count = out_count; in qla4xxx_process_mbox_intr()
43 ha->isp_ops->interrupt_service_routine(ha, intr_status); in qla4xxx_process_mbox_intr()
[all …]
Dql4_os.c100 static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha);
104 static void qla4xxx_config_dma_addressing(struct scsi_qla_host *ha);
269 struct scsi_qla_host *ha = to_qla_host(shost); in qla4xxx_send_ping() local
282 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: IPv4 Ping src: %pI4 " in qla4xxx_send_ping()
284 &ha->ip_config.ip_address, ipaddr)); in qla4xxx_send_ping()
285 rval = qla4xxx_ping_iocb(ha, options, payload_size, pid, in qla4xxx_send_ping()
299 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: LinkLocal Ping " in qla4xxx_send_ping()
301 &ha->ip_config.ipv6_link_local_addr, in qla4xxx_send_ping()
304 rval = qla4xxx_ping_iocb(ha, options, payload_size, in qla4xxx_send_ping()
307 ql4_printk(KERN_WARNING, ha, "%s: iface num = %d " in qla4xxx_send_ping()
[all …]
Dql4_attr.c17 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, in qla4_8xxx_sysfs_read_fw_dump() local
20 if (is_qla40XX(ha)) in qla4_8xxx_sysfs_read_fw_dump()
23 if (!test_bit(AF_82XX_DUMP_READING, &ha->flags)) in qla4_8xxx_sysfs_read_fw_dump()
26 return memory_read_from_buffer(buf, count, &off, ha->fw_dump, in qla4_8xxx_sysfs_read_fw_dump()
27 ha->fw_dump_size); in qla4_8xxx_sysfs_read_fw_dump()
35 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, in qla4_8xxx_sysfs_write_fw_dump() local
41 if (is_qla40XX(ha)) in qla4_8xxx_sysfs_write_fw_dump()
50 ql4_printk(KERN_ERR, ha, "%s: Invalid input. Return err %d\n", in qla4_8xxx_sysfs_write_fw_dump()
58 if (test_and_clear_bit(AF_82XX_DUMP_READING, &ha->flags)) { in qla4_8xxx_sysfs_write_fw_dump()
59 clear_bit(AF_82XX_FW_DUMPED, &ha->flags); in qla4_8xxx_sysfs_write_fw_dump()
[all …]
Dql4_iocb.c16 qla4xxx_space_in_req_ring(struct scsi_qla_host *ha, uint16_t req_cnt) in qla4xxx_space_in_req_ring() argument
21 if ((req_cnt + 2) >= ha->req_q_count) { in qla4xxx_space_in_req_ring()
22 cnt = (uint16_t) ha->isp_ops->rd_shdw_req_q_out(ha); in qla4xxx_space_in_req_ring()
23 if (ha->request_in < cnt) in qla4xxx_space_in_req_ring()
24 ha->req_q_count = cnt - ha->request_in; in qla4xxx_space_in_req_ring()
26 ha->req_q_count = REQUEST_QUEUE_DEPTH - in qla4xxx_space_in_req_ring()
27 (ha->request_in - cnt); in qla4xxx_space_in_req_ring()
31 if ((req_cnt + 2) < ha->req_q_count) in qla4xxx_space_in_req_ring()
37 static void qla4xxx_advance_req_ring_ptr(struct scsi_qla_host *ha) in qla4xxx_advance_req_ring_ptr() argument
40 if (ha->request_in == (REQUEST_QUEUE_DEPTH - 1)) { in qla4xxx_advance_req_ring_ptr()
[all …]
Dql4_bsg.c16 struct scsi_qla_host *ha = to_qla_host(host); in qla4xxx_read_flash() local
27 if (unlikely(pci_channel_offline(ha->pdev))) in qla4xxx_read_flash()
30 if (ql4xxx_reset_active(ha)) { in qla4xxx_read_flash()
31 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); in qla4xxx_read_flash()
36 if (ha->flash_state != QLFLASH_WAITING) { in qla4xxx_read_flash()
37 ql4_printk(KERN_ERR, ha, "%s: another flash operation " in qla4xxx_read_flash()
43 ha->flash_state = QLFLASH_READING; in qla4xxx_read_flash()
47 flash = dma_alloc_coherent(&ha->pdev->dev, length, &flash_dma, in qla4xxx_read_flash()
50 ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for flash " in qla4xxx_read_flash()
56 rval = qla4xxx_get_flash(ha, flash_dma, offset, length); in qla4xxx_read_flash()
[all …]
Dql4_dbg.c33 void qla4xxx_dump_registers(struct scsi_qla_host *ha) in qla4xxx_dump_registers() argument
37 if (is_qla8022(ha)) { in qla4xxx_dump_registers()
40 i, readl(&ha->qla4_82xx_reg->mailbox_in[i])); in qla4xxx_dump_registers()
47 readw(&ha->reg->mailbox[i])); in qla4xxx_dump_registers()
52 readw(&ha->reg->flash_address)); in qla4xxx_dump_registers()
55 readw(&ha->reg->flash_data)); in qla4xxx_dump_registers()
58 readw(&ha->reg->ctrl_status)); in qla4xxx_dump_registers()
60 if (is_qla4010(ha)) { in qla4xxx_dump_registers()
63 readw(&ha->reg->u1.isp4010.nvram)); in qla4xxx_dump_registers()
64 } else if (is_qla4022(ha) | is_qla4032(ha)) { in qla4xxx_dump_registers()
[all …]
Dql4_inline.h22 qla4xxx_lookup_ddb_by_fw_index(struct scsi_qla_host *ha, uint32_t fw_ddb_index) in qla4xxx_lookup_ddb_by_fw_index() argument
27 (ha->fw_ddb_index_map[fw_ddb_index] != in qla4xxx_lookup_ddb_by_fw_index()
29 ddb_entry = ha->fw_ddb_index_map[fw_ddb_index]; in qla4xxx_lookup_ddb_by_fw_index()
33 ha->host_no, __func__, fw_ddb_index, ddb_entry)); in qla4xxx_lookup_ddb_by_fw_index()
39 __qla4xxx_enable_intrs(struct scsi_qla_host *ha) in __qla4xxx_enable_intrs() argument
41 if (is_qla4022(ha) | is_qla4032(ha)) { in __qla4xxx_enable_intrs()
43 &ha->reg->u1.isp4022.intr_mask); in __qla4xxx_enable_intrs()
44 readl(&ha->reg->u1.isp4022.intr_mask); in __qla4xxx_enable_intrs()
46 writel(set_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status); in __qla4xxx_enable_intrs()
47 readl(&ha->reg->ctrl_status); in __qla4xxx_enable_intrs()
[all …]
/drivers/scsi/qla2xxx/
Dqla_sup.c23 qla2x00_lock_nvram_access(struct qla_hw_data *ha) in qla2x00_lock_nvram_access() argument
26 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_lock_nvram_access()
28 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) { in qla2x00_lock_nvram_access()
56 qla2x00_unlock_nvram_access(struct qla_hw_data *ha) in qla2x00_unlock_nvram_access() argument
58 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_unlock_nvram_access()
60 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) { in qla2x00_unlock_nvram_access()
72 qla2x00_nv_write(struct qla_hw_data *ha, uint16_t data) in qla2x00_nv_write() argument
74 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_nv_write()
104 qla2x00_nvram_request(struct qla_hw_data *ha, uint32_t nv_cmd) in qla2x00_nvram_request() argument
107 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_nvram_request()
[all …]
Dqla_os.c344 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req, in qla2x00_alloc_queues() argument
347 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla2x00_alloc_queues()
348 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, in qla2x00_alloc_queues()
350 if (!ha->req_q_map) { in qla2x00_alloc_queues()
356 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, in qla2x00_alloc_queues()
358 if (!ha->rsp_q_map) { in qla2x00_alloc_queues()
367 ha->rsp_q_map[0] = rsp; in qla2x00_alloc_queues()
368 ha->req_q_map[0] = req; in qla2x00_alloc_queues()
369 set_bit(0, ha->rsp_qid_map); in qla2x00_alloc_queues()
370 set_bit(0, ha->req_qid_map); in qla2x00_alloc_queues()
[all …]
Dqla_nx.c355 qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong off_in, in qla82xx_pci_set_crbwindow_2M() argument
359 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
361 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
362 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
367 win_read = RD_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
368 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
372 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
374 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
378 qla82xx_pci_set_crbwindow(struct qla_hw_data *ha, u64 off) in qla82xx_pci_set_crbwindow() argument
380 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow()
[all …]
Dqla_dfs.c19 struct qla_hw_data *ha = vha->hw; in qla2x00_dfs_tgt_sess_show() local
28 spin_lock_irqsave(&ha->tgt.sess_lock, flags); in qla2x00_dfs_tgt_sess_show()
35 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); in qla2x00_dfs_tgt_sess_show()
60 struct qla_hw_data *ha = vha->hw; in qla_dfs_fw_resource_cnt_show() local
64 ha->orig_fw_tgt_xcb_count); in qla_dfs_fw_resource_cnt_show()
66 ha->cur_fw_tgt_xcb_count); in qla_dfs_fw_resource_cnt_show()
68 ha->orig_fw_xcb_count); in qla_dfs_fw_resource_cnt_show()
70 ha->cur_fw_xcb_count); in qla_dfs_fw_resource_cnt_show()
71 seq_printf(s, "Original IOCB count[%d]\n", ha->orig_fw_iocb_count); in qla_dfs_fw_resource_cnt_show()
72 seq_printf(s, "Current IOCB count[%d]\n", ha->cur_fw_iocb_count); in qla_dfs_fw_resource_cnt_show()
[all …]
Dqla_init.c51 struct qla_hw_data *ha = fcport->vha->hw; in qla2x00_sp_timeout() local
55 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_sp_timeout()
56 req = ha->req_q_map[0]; in qla2x00_sp_timeout()
61 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_sp_timeout()
81 struct qla_hw_data *ha = vha->hw; in qla2x00_get_async_timeout() local
84 tmo = ha->r_a_tov / 10 * 2; in qla2x00_get_async_timeout()
85 if (IS_QLAFX00(ha)) { in qla2x00_get_async_timeout()
87 } else if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_get_async_timeout()
92 tmo = ha->login_timeout; in qla2x00_get_async_timeout()
425 struct qla_hw_data *ha = vha->hw; in qla24xx_async_abort_command() local
[all …]
Dqla_attr.c26 struct qla_hw_data *ha = vha->hw; in qla2x00_sysfs_read_fw_dump() local
29 if (!(ha->fw_dump_reading || ha->mctp_dump_reading)) in qla2x00_sysfs_read_fw_dump()
32 if (IS_P3P_TYPE(ha)) { in qla2x00_sysfs_read_fw_dump()
33 if (off < ha->md_template_size) { in qla2x00_sysfs_read_fw_dump()
35 &off, ha->md_tmplt_hdr, ha->md_template_size); in qla2x00_sysfs_read_fw_dump()
38 off -= ha->md_template_size; in qla2x00_sysfs_read_fw_dump()
40 &off, ha->md_dump, ha->md_dump_size); in qla2x00_sysfs_read_fw_dump()
42 } else if (ha->mctp_dumped && ha->mctp_dump_reading) in qla2x00_sysfs_read_fw_dump()
43 return memory_read_from_buffer(buf, count, &off, ha->mctp_dump, in qla2x00_sysfs_read_fw_dump()
45 else if (ha->fw_dump_reading) in qla2x00_sysfs_read_fw_dump()
[all …]
Dqla_mid.c33 struct qla_hw_data *ha = vha->hw; in qla24xx_allocate_vp_id() local
37 mutex_lock(&ha->vport_lock); in qla24xx_allocate_vp_id()
38 vp_id = find_first_zero_bit(ha->vp_idx_map, ha->max_npiv_vports + 1); in qla24xx_allocate_vp_id()
39 if (vp_id > ha->max_npiv_vports) { in qla24xx_allocate_vp_id()
42 vp_id, ha->max_npiv_vports); in qla24xx_allocate_vp_id()
43 mutex_unlock(&ha->vport_lock); in qla24xx_allocate_vp_id()
47 set_bit(vp_id, ha->vp_idx_map); in qla24xx_allocate_vp_id()
48 ha->num_vhosts++; in qla24xx_allocate_vp_id()
51 spin_lock_irqsave(&ha->vport_slock, flags); in qla24xx_allocate_vp_id()
52 list_add_tail(&vha->list, &ha->vp_list); in qla24xx_allocate_vp_id()
[all …]
Dqla_mr.c53 struct qla_hw_data *ha = vha->hw; in qlafx00_mailbox_command() local
54 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qlafx00_mailbox_command()
56 if (ha->pdev->error_state > pci_channel_io_frozen) { in qlafx00_mailbox_command()
69 reg = ha->iobase; in qlafx00_mailbox_command()
75 if (ha->flags.pci_channel_io_perm_failure) { in qlafx00_mailbox_command()
81 if (ha->flags.isp82xx_fw_hung) { in qlafx00_mailbox_command()
85 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); in qlafx00_mailbox_command()
95 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { in qlafx00_mailbox_command()
103 ha->flags.mbox_busy = 1; in qlafx00_mailbox_command()
105 ha->mcp32 = mcp; in qlafx00_mailbox_command()
[all …]
/drivers/scsi/
Dips.c277 static void ips_free_flash_copperhead(ips_ha_t * ha);
328 static int ips_abort_init(ips_ha_t * ha, int index);
334 static int ips_poll_for_flush_complete(ips_ha_t * ha);
335 static void ips_flush_and_reset(ips_ha_t *ha);
583 ips_setup_funclist(ips_ha_t * ha) in ips_setup_funclist() argument
589 if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) { in ips_setup_funclist()
591 ha->func.isintr = ips_isintr_morpheus; in ips_setup_funclist()
592 ha->func.isinit = ips_isinit_morpheus; in ips_setup_funclist()
593 ha->func.issue = ips_issue_i2o_memio; in ips_setup_funclist()
594 ha->func.init = ips_init_morpheus; in ips_setup_funclist()
[all …]
Dgdth.c146 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha,
148 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index,
150 static int gdth_async_event(gdth_ha_str *ha);
153 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority);
154 static void gdth_next(gdth_ha_str *ha);
155 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b);
156 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp);
157 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source,
159 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
160 static void gdth_readapp_event(gdth_ha_str *ha, u8 application,
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Dqla1280.c407 #define IS_ISP1040(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1020) argument
408 #define IS_ISP1x40(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1020 || \ argument
409 ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1240)
410 #define IS_ISP1x160(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP10160 || \ argument
411 ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP12160)
606 static int qla1280_read_nvram(struct scsi_qla_host *ha) in qla1280_read_nvram() argument
618 printk(KERN_INFO "scsi(%ld): Reading NVRAM\n", ha->host_no); in qla1280_read_nvram()
620 wptr = (uint16_t *)&ha->nvram; in qla1280_read_nvram()
621 nv = &ha->nvram; in qla1280_read_nvram()
624 *wptr = qla1280_get_nvram_word(ha, cnt); in qla1280_read_nvram()
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/drivers/scsi/libsas/
Dsas_event.c30 void sas_queue_work(struct sas_ha_struct *ha, struct sas_work *sw) in sas_queue_work() argument
32 if (!test_bit(SAS_HA_REGISTERED, &ha->state)) in sas_queue_work()
35 if (test_bit(SAS_HA_DRAINING, &ha->state)) { in sas_queue_work()
38 list_add(&sw->drain_node, &ha->defer_q); in sas_queue_work()
40 scsi_queue_work(ha->core.shost, &sw->work); in sas_queue_work()
45 struct sas_ha_struct *ha) in sas_queue_event() argument
50 spin_lock_irqsave(&ha->lock, flags); in sas_queue_event()
51 sas_queue_work(ha, work); in sas_queue_event()
52 spin_unlock_irqrestore(&ha->lock, flags); in sas_queue_event()
57 void __sas_drain_work(struct sas_ha_struct *ha) in __sas_drain_work() argument
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