| /drivers/spi/ |
| D | spi-s3c24xx.c | 42 unsigned int hz; member
124 unsigned int hz; in s3c24xx_spi_update_state() local
128 hz = t ? t->speed_hz : spi->max_speed_hz; in s3c24xx_spi_update_state()
130 if (!hz) in s3c24xx_spi_update_state()
131 hz = spi->max_speed_hz; in s3c24xx_spi_update_state()
146 if (cs->hz != hz) { in s3c24xx_spi_update_state()
148 div = DIV_ROUND_UP(clk, hz * 2) - 1; in s3c24xx_spi_update_state()
154 div, hz, clk / (2 * (div + 1))); in s3c24xx_spi_update_state()
156 cs->hz = hz; in s3c24xx_spi_update_state()
192 cs->hz = -1; in s3c24xx_spi_setup()
|
| D | spi-bitbang.c | 143 u32 hz; in spi_bitbang_setup_transfer() local
147 hz = t->speed_hz; in spi_bitbang_setup_transfer()
150 hz = 0; in spi_bitbang_setup_transfer()
166 if (!hz) in spi_bitbang_setup_transfer()
167 hz = spi->max_speed_hz; in spi_bitbang_setup_transfer()
168 if (hz) { in spi_bitbang_setup_transfer()
169 cs->nsecs = (1000000000/2) / hz; in spi_bitbang_setup_transfer()
|
| D | spi-omap-uwire.c | 314 unsigned hz; in uwire_setup_transfer() local
348 hz = t->speed_hz; in uwire_setup_transfer()
350 hz = spi->max_speed_hz; in uwire_setup_transfer()
352 if (!hz) { in uwire_setup_transfer()
375 div2 = (rate / div1 + hz - 1) / hz; in uwire_setup_transfer()
381 dev_name(&spi->dev), rate / 10 / 8, hz); in uwire_setup_transfer()
|
| D | spi-st-ssc4.c | 187 u32 hz = spi->max_speed_hz; in spi_st_setup() local
191 if (!hz) { in spi_st_setup()
214 sscbrg = spi_st_clk / (2 * hz); in spi_st_setup()
217 "baudrate %d outside valid range %d\n", sscbrg, hz); in spi_st_setup()
230 hz, spi_st->baud, sscbrg); in spi_st_setup()
|
| D | spi-sc18is602.c | 138 static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode) in sc18is602_setup_transfer() argument
151 if (hz >= hw->freq / 4) { in sc18is602_setup_transfer()
154 } else if (hz >= hw->freq / 16) { in sc18is602_setup_transfer()
157 } else if (hz >= hw->freq / 64) { in sc18is602_setup_transfer()
|
| D | spi-fsl-spi.c | 228 u32 hz = 0; in fsl_spi_setup_transfer() local
235 hz = t->speed_hz; in fsl_spi_setup_transfer()
242 if (!hz) in fsl_spi_setup_transfer()
243 hz = spi->max_speed_hz; in fsl_spi_setup_transfer()
267 if ((mpc8xxx_spi->spibrg / hz) > 64) { in fsl_spi_setup_transfer()
269 pm = (mpc8xxx_spi->spibrg - 1) / (hz * 64) + 1; in fsl_spi_setup_transfer()
273 hz, mpc8xxx_spi->spibrg / 1024); in fsl_spi_setup_transfer()
277 pm = (mpc8xxx_spi->spibrg - 1) / (hz * 4) + 1; in fsl_spi_setup_transfer()
|
| D | spi-mxs.c | 77 const unsigned int hz = min(dev->max_speed_hz, t->speed_hz); in mxs_spi_setup_transfer() local
79 if (hz == 0) { in mxs_spi_setup_transfer()
84 if (hz != spi->sck) { in mxs_spi_setup_transfer()
85 mxs_ssp_set_clk_rate(ssp, hz); in mxs_spi_setup_transfer()
91 spi->sck = hz; in mxs_spi_setup_transfer()
|
| D | spi-fsl-espi.c | 213 u32 hz = t ? t->speed_hz : spi->max_speed_hz; in fsl_espi_setup_transfer() local
239 if ((mpc8xxx_spi->spibrg / hz) > 64) { in fsl_espi_setup_transfer()
241 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 16 * 4); in fsl_espi_setup_transfer()
245 hz, mpc8xxx_spi->spibrg / (4 * 16 * (32 + 1))); in fsl_espi_setup_transfer()
249 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 4); in fsl_espi_setup_transfer()
|
| D | spi-bcm63xx-hsspi.c | 126 struct spi_device *spi, int hz) in bcm63xx_hsspi_set_clk() argument
131 reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz)); in bcm63xx_hsspi_set_clk()
136 if (hz > HSSPI_MAX_SYNC_CLOCK) in bcm63xx_hsspi_set_clk()
|
| D | spi-au1550.c | 233 unsigned bpw, hz; in au1550_spi_setupxfer() local
238 hz = t->speed_hz; in au1550_spi_setupxfer()
241 hz = spi->max_speed_hz; in au1550_spi_setupxfer()
244 if (!hz) in au1550_spi_setupxfer()
263 cfg |= au1550_spi_baudcfg(hw, hz); in au1550_spi_setupxfer()
|
| D | spi-davinci.c | 281 u32 hz = 0, spifmt = 0; in davinci_spi_setup_transfer() local
291 hz = t->speed_hz; in davinci_spi_setup_transfer()
312 if (!hz) in davinci_spi_setup_transfer()
313 hz = spi->max_speed_hz; in davinci_spi_setup_transfer()
317 prescale = davinci_spi_get_prescale(dspi, hz); in davinci_spi_setup_transfer()
|
| /drivers/i2c/busses/ |
| D | i2c-brcmstb.c | 92 u32 hz; member
124 .hz = 375000,
129 .hz = 390000,
134 .hz = 187500,
139 .hz = 200000,
144 .hz = 93750,
149 .hz = 97500,
154 .hz = 46875,
159 .hz = 50000,
556 if (bsc_clk[i].hz == clk_freq_hz) { in brcmstb_i2c_set_bus_speed()
[all …]
|
| /drivers/iio/pressure/ |
| D | zpa2326.c | 90 int hz; member
99 { .hz = 1, .odr = 1 << ZPA2326_CTRL_REG3_ODR_SHIFT },
100 { .hz = 5, .odr = 5 << ZPA2326_CTRL_REG3_ODR_SHIFT },
101 { .hz = 11, .odr = 6 << ZPA2326_CTRL_REG3_ODR_SHIFT },
102 { .hz = 23, .odr = 7 << ZPA2326_CTRL_REG3_ODR_SHIFT },
438 zpa2326_dbg(indio_dev, "one shot mode setup @%dHz", freq->hz); in zpa2326_config_oneshot()
1394 priv->frequency->hz); in zpa2326_set_trigger_state()
1453 return ((struct zpa2326_private *)iio_priv(indio_dev))->frequency->hz; in zpa2326_get_frequency()
1456 static int zpa2326_set_frequency(struct iio_dev *indio_dev, int hz) in zpa2326_set_frequency() argument
1464 if (zpa2326_sampling_frequencies[freq].hz == hz) in zpa2326_set_frequency()
|
| /drivers/ssb/ |
| D | driver_mipscore.c | 296 unsigned long hz, ns; in ssb_mipscore_init() local
305 hz = ssb_clockspeed(bus); in ssb_mipscore_init()
306 if (!hz) in ssb_mipscore_init()
307 hz = 100000000; in ssb_mipscore_init()
308 ns = 1000000000 / hz; in ssb_mipscore_init()
|
| /drivers/iio/common/st_sensors/ |
| D | st_sensors_core.c | 74 if (sensor_settings->odr.odr_avl[i].hz == 0) in st_sensors_match_odr()
77 if (sensor_settings->odr.odr_avl[i].hz == odr) { in st_sensors_match_odr()
78 odr_out->hz = sensor_settings->odr.odr_avl[i].hz; in st_sensors_match_odr()
118 sdata->odr = odr_out.hz; in st_sensors_set_odr()
203 sdata->odr = odr_out.hz; in st_sensors_set_enable()
610 if (sdata->sensor_settings->odr.odr_avl[i].hz == 0) in st_sensors_sysfs_sampling_frequency_avail()
614 sdata->sensor_settings->odr.odr_avl[i].hz); in st_sensors_sysfs_sampling_frequency_avail()
|
| /drivers/clocksource/ |
| D | mmio.c | 53 unsigned long hz, int rating, unsigned bits, in clocksource_mmio_init() argument
72 return clocksource_register_hz(&cs->clksrc, hz); in clocksource_mmio_init()
|
| /drivers/pwm/ |
| D | pwm-tegra.c | 78 unsigned long rate, hz; in tegra_pwm_config() local
102 hz = DIV_ROUND_CLOSEST_ULL(ns100, period_ns); in tegra_pwm_config()
103 rate = DIV_ROUND_CLOSEST(rate * 100, hz); in tegra_pwm_config()
|
| /drivers/gpu/drm/via/ |
| D | via_verifier.c | 114 hazard_t hz; member
347 investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq) in investigate_hazard() argument
351 if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) { in investigate_hazard()
357 switch (hz) { in investigate_hazard()
629 hazard_t hz; in via_check_header2() local
696 if ((hz = hz_table[cmd >> 24])) { in via_check_header2()
697 if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) { in via_check_header2()
1100 table[init_table[i].code] = init_table[i].hz; in setup_hazard_table()
|
| /drivers/staging/sm750fb/ |
| D | readme | 10 Use 1280,8bpp index color and 60 hz mode:
33 refresh rate, kernel driver will defaulty use 16bpp and 60hz
|
| /drivers/mmc/host/ |
| D | mtk-sd.c | 526 static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) in msdc_set_mclk() argument
533 if (!hz) { in msdc_set_mclk()
551 if (hz >= (host->src_clk_freq >> 2)) { in msdc_set_mclk()
555 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
561 hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
567 } else if (hz >= host->src_clk_freq) { in msdc_set_mclk()
573 if (hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
577 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
587 host->mclk = hz; in msdc_set_mclk()
|
| /drivers/video/fbdev/ |
| D | sm712fb.c | 52 u_int hz; member
1115 sfb->width, sfb->height, sfb->fb->var.bits_per_pixel, sfb->hz); in sm7xx_set_timing()
1121 vgamode[j].hz != sfb->hz) in sm7xx_set_timing()
1127 vgamode[j].bpp, vgamode[j].hz); in sm7xx_set_timing()
1265 sfb->hz = 60; in smtcfb_setmode()
|
| D | sm712.h | 85 int hz; member
|
| /drivers/input/keyboard/ |
| D | lm8323.c | 456 int div512, perstep, steps, hz, up, kill; in lm8323_pwm_work() local
481 hz = 32768 / 512; in lm8323_pwm_work()
484 hz = 32768 / 16; in lm8323_pwm_work()
487 perstep = (hz * pwm->fade_time) / (steps * 1000); in lm8323_pwm_work()
|
| /drivers/gpu/host1x/ |
| D | intr.c | 305 u32 hz = clk_get_rate(host->clk); in host1x_intr_start() local
309 err = host1x_hw_intr_init_host_sync(host, DIV_ROUND_UP(hz, 1000000), in host1x_intr_start()
|
| /drivers/video/fbdev/core/ |
| D | fbmon.c | 720 int num_modes, hz, hscan, pixclock; in fb_get_monitor_limits() local
746 hz = (hscan + vtotal / 2) / vtotal; in fb_get_monitor_limits()
760 if (specs->vfmax == 0 || specs->vfmax < hz) in fb_get_monitor_limits()
761 specs->vfmax = hz; in fb_get_monitor_limits()
763 if (specs->vfmin == 0 || specs->vfmin > hz) in fb_get_monitor_limits()
764 specs->vfmin = hz; in fb_get_monitor_limits()
|