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Searched refs:intr_mask (Results 1 – 25 of 57) sorted by relevance

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/drivers/tty/serial/
Detraxfs-uart.c290 reg_ser_rw_intr_mask intr_mask; in etraxfs_uart_start_tx_bottom() local
295 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask); in etraxfs_uart_start_tx_bottom()
296 intr_mask.tr_rdy = regk_ser_yes; in etraxfs_uart_start_tx_bottom()
297 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask); in etraxfs_uart_start_tx_bottom()
315 reg_ser_rw_intr_mask intr_mask; in etraxfs_uart_stop_tx() local
325 intr_mask = REG_RD(ser, regi_ser, rw_intr_mask); in etraxfs_uart_stop_tx()
326 intr_mask.tr_rdy = regk_ser_no; in etraxfs_uart_stop_tx()
327 REG_WR(ser, regi_ser, rw_intr_mask, intr_mask); in etraxfs_uart_stop_tx()
410 reg_ser_rw_intr_mask intr_mask; in etraxfs_uart_break_ctl() local
415 intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask); in etraxfs_uart_break_ctl()
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Dtilegx.c343 UART_INTERRUPT_MASK_t intr_mask; in tilegx_startup() local
372 intr_mask.word = gxio_uart_read(context, UART_INTERRUPT_MASK); in tilegx_startup()
373 intr_mask.wfifo_re = 0; in tilegx_startup()
374 intr_mask.rfifo_we = 0; in tilegx_startup()
375 gxio_uart_write(context, UART_INTERRUPT_MASK, intr_mask.word); in tilegx_startup()
406 UART_INTERRUPT_MASK_t intr_mask; in tilegx_shutdown() local
417 intr_mask.word = gxio_uart_read(context, UART_INTERRUPT_MASK); in tilegx_shutdown()
418 intr_mask.wfifo_re = 1; in tilegx_shutdown()
419 intr_mask.rfifo_we = 1; in tilegx_shutdown()
420 gxio_uart_write(context, UART_INTERRUPT_MASK, intr_mask.word); in tilegx_shutdown()
/drivers/scsi/qla4xxx/
Dql4_inline.h43 &ha->reg->u1.isp4022.intr_mask); in __qla4xxx_enable_intrs()
44 readl(&ha->reg->u1.isp4022.intr_mask); in __qla4xxx_enable_intrs()
57 &ha->reg->u1.isp4022.intr_mask); in __qla4xxx_disable_intrs()
58 readl(&ha->reg->u1.isp4022.intr_mask); in __qla4xxx_disable_intrs()
Dql4_dbg.c66 (uint8_t) offsetof(struct isp_reg, u1.isp4022.intr_mask), in qla4xxx_dump_registers()
67 readw(&ha->reg->u1.isp4022.intr_mask)); in qla4xxx_dump_registers()
/drivers/i2c/busses/
Di2c-xlp9xx.c231 u32 intr_mask, cmd, val; in xlp9xx_i2c_xfer_msg() local
274 intr_mask = (XLP9XX_I2C_INTEN_ARLOST | XLP9XX_I2C_INTEN_BUSERR | in xlp9xx_i2c_xfer_msg()
278 intr_mask |= XLP9XX_I2C_INTEN_MFIFOHI; in xlp9xx_i2c_xfer_msg()
280 intr_mask |= XLP9XX_I2C_INTEN_SADDR; in xlp9xx_i2c_xfer_msg()
283 intr_mask |= XLP9XX_I2C_INTEN_SADDR; in xlp9xx_i2c_xfer_msg()
285 intr_mask |= XLP9XX_I2C_INTEN_MFIFOEMTY; in xlp9xx_i2c_xfer_msg()
287 xlp9xx_i2c_unmask_irq(priv, intr_mask); in xlp9xx_i2c_xfer_msg()
Di2c-designware-core.c527 u32 intr_mask; in i2c_dw_xfer_msg() local
534 intr_mask = DW_IC_INTR_DEFAULT_MASK; in i2c_dw_xfer_msg()
621 intr_mask &= ~DW_IC_INTR_TX_EMPTY; in i2c_dw_xfer_msg()
624 intr_mask = 0; in i2c_dw_xfer_msg()
626 dw_writel(dev, intr_mask, DW_IC_INTR_MASK); in i2c_dw_xfer_msg()
/drivers/fpga/
Dzynq-fpga.c149 u32 intr_mask; in zynq_fpga_mask_irqs() local
151 intr_mask = zynq_fpga_read(priv, INT_MASK_OFFSET); in zynq_fpga_mask_irqs()
153 intr_mask | IXR_DMA_DONE_MASK | IXR_ERROR_FLAGS_MASK); in zynq_fpga_mask_irqs()
158 u32 intr_mask; in zynq_fpga_unmask_irqs() local
160 intr_mask = zynq_fpga_read(priv, INT_MASK_OFFSET); in zynq_fpga_unmask_irqs()
162 intr_mask in zynq_fpga_unmask_irqs()
/drivers/soc/qcom/
Dsmsm.c468 u32 *intr_mask; in qcom_smsm_probe() local
537 intr_mask = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_SMSM_CPU_INTR_MASK, NULL); in qcom_smsm_probe()
538 if (IS_ERR(intr_mask)) { in qcom_smsm_probe()
540 return PTR_ERR(intr_mask); in qcom_smsm_probe()
545 smsm->subscription = intr_mask + smsm->local_host * smsm->num_hosts; in qcom_smsm_probe()
572 entry->subscription = intr_mask + id * smsm->num_hosts; in qcom_smsm_probe()
/drivers/scsi/bfa/
Dbfa_hw_ct.c42 bfa_regs->intr_mask = (kva + HOSTFN0_INT_MSK); in bfa_hwct_reginit()
45 bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK); in bfa_hwct_reginit()
56 bfa_regs->intr_mask = (kva + CT2_HOSTFN_INTR_MASK); in bfa_hwct2_reginit()
Dbfa_hw_cb.c32 bfa_regs->intr_mask = (kva + HOSTFN0_INT_MSK); in bfa_hwcb_reginit()
35 bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK); in bfa_hwcb_reginit()
/drivers/spi/
Dspi-xlp.c283 u32 intr_mask = 0; in xlp_spi_xfer_block() local
303 intr_mask |= XLP_SPI_INTR_TXTH | XLP_SPI_INTR_TXUF | in xlp_spi_xfer_block()
306 intr_mask |= XLP_SPI_INTR_RXTH | XLP_SPI_INTR_RXOF; in xlp_spi_xfer_block()
308 intr_mask |= XLP_SPI_INTR_DONE; in xlp_spi_xfer_block()
309 xlp_spi_reg_write(xs, xs->cs, XLP_SPI_INTR_EN, intr_mask); in xlp_spi_xfer_block()
/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
Dbase.c115 gpio->func->intr_mask(gpio, type, 1 << index, 0); in nvkm_gpio_intr_fini()
122 gpio->func->intr_mask(gpio, type, 1 << index, 1 << index); in nvkm_gpio_intr_init()
169 gpio->func->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0); in nvkm_gpio_fini()
Dpriv.h18 void (*intr_mask)(struct nvkm_gpio *, u32, u32, u32); member
Dg94.c64 .intr_mask = g94_gpio_intr_mask,
/drivers/net/ethernet/silan/
Dsc92031.c290 atomic_t intr_mask; member
358 atomic_set(&priv->intr_mask, 0); in sc92031_disable_interrupts()
378 atomic_set(&priv->intr_mask, IntrBits); in sc92031_enable_interrupts()
626 atomic_set(&priv->intr_mask, 0); in _sc92031_reset()
839 u32 intr_status, intr_mask; in sc92031_tasklet() local
866 intr_mask = atomic_read(&priv->intr_mask); in sc92031_tasklet()
869 iowrite32(intr_mask, port_base + IntrMask); in sc92031_tasklet()
880 u32 intr_status, intr_mask; in sc92031_interrupt() local
900 intr_mask = atomic_read(&priv->intr_mask); in sc92031_interrupt()
903 iowrite32(intr_mask, port_base + IntrMask); in sc92031_interrupt()
/drivers/usb/dwc2/
Dhcd_queue.c1652 u32 intr_mask; in dwc2_hcd_qh_add() local
1677 intr_mask = dwc2_readl(hsotg->regs + GINTMSK); in dwc2_hcd_qh_add()
1678 intr_mask |= GINTSTS_SOF; in dwc2_hcd_qh_add()
1679 dwc2_writel(intr_mask, hsotg->regs + GINTMSK); in dwc2_hcd_qh_add()
1695 u32 intr_mask; in dwc2_hcd_qh_unlink() local
1715 intr_mask = dwc2_readl(hsotg->regs + GINTMSK); in dwc2_hcd_qh_unlink()
1716 intr_mask &= ~GINTSTS_SOF; in dwc2_hcd_qh_unlink()
1717 dwc2_writel(intr_mask, hsotg->regs + GINTMSK); in dwc2_hcd_qh_unlink()
/drivers/watchdog/
Dcpwd.c86 u8 intr_mask; member
209 (p->devs[index].intr_mask); in cpwd_toggleintr()
315 if (intr & p->devs[index].intr_mask) { in cpwd_getstatus()
598 p->devs[i].intr_mask = (WD0_INTR_MASK << i); in cpwd_probe()
/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
Dbase.c42 if (likely(mc) && mc->func->intr_mask) { in nvkm_mc_intr_mask()
48 mc->func->intr_mask(mc, mask, en ? mask : 0); in nvkm_mc_intr_mask()
Dgk20a.c32 .intr_mask = gf100_mc_intr_mask,
Dgk104.c56 .intr_mask = gf100_mc_intr_mask,
Dgt215.c68 .intr_mask = gt215_mc_intr_mask,
Dpriv.h25 void (*intr_mask)(struct nvkm_mc *, u32 mask, u32 stat); member
/drivers/uio/
Duio_pruss.c80 int val, intr_mask = (1 << intr_bit); in pruss_handler() local
88 if (!(val & intr_mask) && (ioread32(intrstat_reg) & HIPIR_NOPEND)) in pruss_handler()
/drivers/iio/adc/
Dbcm_iproc_adc.c150 u32 intr_mask; in iproc_adc_interrupt_thread() local
160 regmap_read(adc_priv->regmap, IPROC_INTERRUPT_MASK, &intr_mask); in iproc_adc_interrupt_thread()
161 intr_status = intr_status & intr_mask; in iproc_adc_interrupt_thread()
/drivers/scsi/
Dmesh.h33 unsigned char intr_mask; member

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