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Searched refs:layout (Results 1 – 25 of 44) sorted by relevance

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/drivers/media/platform/soc_camera/
Dsoc_mediabus.c27 .layout = SOC_MBUS_LAYOUT_PACKED,
37 .layout = SOC_MBUS_LAYOUT_PACKED,
47 .layout = SOC_MBUS_LAYOUT_PACKED,
57 .layout = SOC_MBUS_LAYOUT_PACKED,
67 .layout = SOC_MBUS_LAYOUT_PACKED,
77 .layout = SOC_MBUS_LAYOUT_PACKED,
87 .layout = SOC_MBUS_LAYOUT_PACKED,
97 .layout = SOC_MBUS_LAYOUT_PACKED,
143 .layout = SOC_MBUS_LAYOUT_PACKED,
153 .layout = SOC_MBUS_LAYOUT_PACKED,
[all …]
/drivers/clk/at91/
Dclk-programmable.c25 #define PROG_PRES(layout, pckr) ((pckr >> layout->pres_shift) & PROG_PRES_MASK) argument
38 const struct clk_programmable_layout *layout; member
51 return parent_rate >> PROG_PRES(prog->layout, pckr); in clk_programmable_recalc_rate()
100 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_set_parent() local
101 unsigned int mask = layout->css_mask; in clk_programmable_set_parent()
104 if (layout->have_slck_mck) in clk_programmable_set_parent()
107 if (index > layout->css_mask) { in clk_programmable_set_parent()
108 if (index > PROG_MAX_RM9200_CSS && !layout->have_slck_mck) in clk_programmable_set_parent()
122 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_get_parent() local
128 ret = pckr & layout->css_mask; in clk_programmable_get_parent()
[all …]
Dclk-pll.c25 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \ argument
26 (layout)->mul_mask)
28 #define PLL_MUL_MASK(layout) ((layout)->mul_mask) argument
29 #define PLL_MUL_MAX(layout) (PLL_MUL_MASK(layout) + 1) argument
60 const struct clk_pll_layout *layout; member
77 const struct clk_pll_layout *layout = pll->layout; in clk_pll_prepare() local
91 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
105 regmap_update_bits(regmap, offset, layout->pllr_mask, in clk_pll_prepare()
108 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
126 unsigned int mask = pll->layout->pllr_mask; in clk_pll_unprepare()
[all …]
Dclk-master.c43 const struct clk_master_layout *layout; member
80 const struct clk_master_layout *layout = master->layout; in clk_master_recalc_rate() local
86 mckr &= layout->mask; in clk_master_recalc_rate()
88 pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK; in clk_master_recalc_rate()
127 const struct clk_master_layout *layout, in at91_clk_register_master() argument
149 master->layout = layout; in at91_clk_register_master()
202 const struct clk_master_layout *layout) in of_at91_clk_master_setup() argument
228 parent_names, layout, in of_at91_clk_master_setup()
/drivers/md/
Draid5.h598 static inline int algorithm_valid_raid5(int layout) in algorithm_valid_raid5() argument
600 return (layout >= 0) && in algorithm_valid_raid5()
601 (layout <= 5); in algorithm_valid_raid5()
603 static inline int algorithm_valid_raid6(int layout) in algorithm_valid_raid6() argument
605 return (layout >= 0 && layout <= 5) in algorithm_valid_raid6()
607 (layout >= 8 && layout <= 10) in algorithm_valid_raid6()
609 (layout >= 16 && layout <= 20); in algorithm_valid_raid6()
612 static inline int algorithm_is_DDF(int layout) in algorithm_is_DDF() argument
614 return layout >= 8 && layout <= 10; in algorithm_is_DDF()
Ddm-raid.c365 static bool __is_raid10_far(int layout);
464 static unsigned int __raid10_near_copies(int layout) in __raid10_near_copies() argument
466 return layout & 0xFF; in __raid10_near_copies()
470 static unsigned int __raid10_far_copies(int layout) in __raid10_far_copies() argument
472 return __raid10_near_copies(layout >> RAID10_FAR_COPIES_SHIFT); in __raid10_far_copies()
476 static bool __is_raid10_offset(int layout) in __is_raid10_offset() argument
478 return !!(layout & RAID10_OFFSET); in __is_raid10_offset()
482 static bool __is_raid10_near(int layout) in __is_raid10_near() argument
484 return !__is_raid10_offset(layout) && __raid10_near_copies(layout) > 1; in __is_raid10_near()
488 static bool __is_raid10_far(int layout) in __is_raid10_far() argument
[all …]
Dmd.c1066 mddev->layout = sb->layout; in super_90_validate()
1089 mddev->new_layout = mddev->layout; in super_90_validate()
1235 sb->layout = mddev->layout; in super_90_sync()
1504 sb->layout != refsb->layout || in super_1_load()
1551 mddev->layout = le32_to_cpu(sb->layout); in super_1_validate()
1603 mddev->new_layout = mddev->layout; in super_1_validate()
1709 sb->layout = cpu_to_le32(mddev->layout); in super_1_sync()
2273 (mddev->layout != le32_to_cpu(sb->layout)) || in does_sb_need_changing()
3523 mddev->new_layout = mddev->layout; in level_store()
3546 mddev->layout = mddev->new_layout; in level_store()
[all …]
Draid0.c551 if (mddev->layout != ((1 << 8) + 2)) { in raid0_takeover_raid10()
554 mddev->layout); in raid0_takeover_raid10()
642 if (mddev->layout == ALGORITHM_PARITY_N) in raid0_takeover()
/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_layer.h99 #define ATMEL_HLCDC_LAYER_POS_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.pos)
100 #define ATMEL_HLCDC_LAYER_SIZE_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.size)
101 #define ATMEL_HLCDC_LAYER_MEMSIZE_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.memsize)
102 #define ATMEL_HLCDC_LAYER_XSTRIDE_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.xstride)
103 #define ATMEL_HLCDC_LAYER_PSTRIDE_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.pstride)
104 #define ATMEL_HLCDC_LAYER_DFLTCOLOR_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.default_color)
105 #define ATMEL_HLCDC_LAYER_CRKEY_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.chroma_key)
106 #define ATMEL_HLCDC_LAYER_CRKEY_MASK_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.chroma_key_m…
108 #define ATMEL_HLCDC_LAYER_GENERAL_CFG(p) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.general_config)
125 #define ATMEL_HLCDC_LAYER_CSC_CFG(p, o) ATMEL_HLCDC_LAYER_CFG(p, (p)->desc->layout.csc + o)
[all …]
Datmel_hlcdc_plane.c266 const struct atmel_hlcdc_layer_cfg_layout *layout = in atmel_hlcdc_plane_update_pos_and_size() local
267 &plane->layer.desc->layout; in atmel_hlcdc_plane_update_pos_and_size()
269 if (layout->size) in atmel_hlcdc_plane_update_pos_and_size()
271 layout->size, in atmel_hlcdc_plane_update_pos_and_size()
276 if (layout->memsize) in atmel_hlcdc_plane_update_pos_and_size()
278 layout->memsize, in atmel_hlcdc_plane_update_pos_and_size()
283 if (layout->pos) in atmel_hlcdc_plane_update_pos_and_size()
285 layout->pos, in atmel_hlcdc_plane_update_pos_and_size()
351 const struct atmel_hlcdc_layer_cfg_layout *layout = in atmel_hlcdc_plane_update_general_settings() local
352 &plane->layer.desc->layout; in atmel_hlcdc_plane_update_general_settings()
[all …]
Datmel_hlcdc_dc.c40 .layout = {
69 .layout = {
84 .layout = {
102 .layout = {
124 .layout = {
157 .layout = {
172 .layout = {
190 .layout = {
208 .layout = {
230 .layout = {
[all …]
/drivers/staging/android/
Dvsoc.c102 struct vsoc_shm_layout_descriptor *layout; member
175 if (iminor(inode) >= vsoc_dev.layout->region_count) { in vsoc_validate_inode()
743 reg_num >= vsoc_dev.layout->region_count)) { in vsoc_interrupt()
814 vsoc_dev.layout = in vsoc_probe_device()
817 vsoc_dev.layout->major_version); in vsoc_probe_device()
819 vsoc_dev.layout->minor_version); in vsoc_probe_device()
820 dev_info(&pdev->dev, "size: 0x%x\n", vsoc_dev.layout->size); in vsoc_probe_device()
821 dev_info(&pdev->dev, "regions: %d\n", vsoc_dev.layout->region_count); in vsoc_probe_device()
822 if (vsoc_dev.layout->major_version != in vsoc_probe_device()
830 result = alloc_chrdev_region(&devt, 0, vsoc_dev.layout->region_count, in vsoc_probe_device()
[all …]
/drivers/staging/comedi/drivers/
Dcb_pcidas64.c645 enum register_layout layout; member
679 if (board->layout == LAYOUT_4020) in ai_dma_ring_count()
696 .layout = LAYOUT_64XX,
712 .layout = LAYOUT_64XX,
728 .layout = LAYOUT_64XX,
744 .layout = LAYOUT_64XX,
760 .layout = LAYOUT_64XX,
775 .layout = LAYOUT_60XX,
791 .layout = LAYOUT_60XX,
806 .layout = LAYOUT_60XX,
[all …]
/drivers/input/keyboard/
Dsunkbd.c86 volatile s8 layout; member
109 if (sunkbd->layout == -1) { in sunkbd_interrupt()
110 sunkbd->layout = data; in sunkbd_interrupt()
123 sunkbd->layout = -1; in sunkbd_interrupt()
205 sunkbd->layout = -2; in sunkbd_initialize()
208 sunkbd->layout >= 0, HZ / 4); in sunkbd_initialize()
209 if (sunkbd->layout < 0) in sunkbd_initialize()
211 if (sunkbd->layout & SUNKBD_LAYOUT_5_MASK) in sunkbd_initialize()
/drivers/media/platform/
Dpxa_camera.c242 enum pxa_mbus_layout layout; member
265 .layout = PXA_MBUS_LAYOUT_PACKED,
275 .layout = PXA_MBUS_LAYOUT_PACKED,
285 .layout = PXA_MBUS_LAYOUT_PACKED,
295 .layout = PXA_MBUS_LAYOUT_PACKED,
305 .layout = PXA_MBUS_LAYOUT_PACKED,
315 .layout = PXA_MBUS_LAYOUT_PACKED,
325 .layout = PXA_MBUS_LAYOUT_PACKED,
335 .layout = PXA_MBUS_LAYOUT_PACKED,
345 .layout = PXA_MBUS_LAYOUT_PACKED,
[all …]
/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi5_core.c669 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) in hdmi5_core_audio_config()
679 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) in hdmi5_core_audio_config()
690 if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) in hdmi5_core_audio_config()
751 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) { in hdmi5_core_audio_config()
756 } else if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) { in hdmi5_core_audio_config()
856 core_cfg.layout = HDMI_AUDIO_LAYOUT_2CH; in hdmi5_audio_config()
858 core_cfg.layout = HDMI_AUDIO_LAYOUT_6CH; in hdmi5_audio_config()
860 core_cfg.layout = HDMI_AUDIO_LAYOUT_8CH; in hdmi5_audio_config()
Dhdmi4_core.c613 REG_FLD_MOD(av_base, HDMI_CORE_AV_HDMI_CTRL, cfg->layout, 2, 1); in hdmi_core_audio_config()
812 acore.layout = HDMI_AUDIO_LAYOUT_2CH; in hdmi4_audio_config()
818 acore.layout = HDMI_AUDIO_LAYOUT_8CH; in hdmi4_audio_config()
Dhdmi.h224 enum hdmi_core_audio_layout layout; member
/drivers/gpu/drm/omapdrm/dss/
Dhdmi5_core.c685 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) in hdmi5_core_audio_config()
695 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) in hdmi5_core_audio_config()
706 if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) in hdmi5_core_audio_config()
767 if (cfg->layout == HDMI_AUDIO_LAYOUT_2CH) { in hdmi5_core_audio_config()
772 } else if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) { in hdmi5_core_audio_config()
872 core_cfg.layout = HDMI_AUDIO_LAYOUT_2CH; in hdmi5_audio_config()
874 core_cfg.layout = HDMI_AUDIO_LAYOUT_6CH; in hdmi5_audio_config()
876 core_cfg.layout = HDMI_AUDIO_LAYOUT_8CH; in hdmi5_audio_config()
Dhdmi4_core.c613 REG_FLD_MOD(av_base, HDMI_CORE_AV_HDMI_CTRL, cfg->layout, 2, 1); in hdmi_core_audio_config()
812 acore.layout = HDMI_AUDIO_LAYOUT_2CH; in hdmi4_audio_config()
818 acore.layout = HDMI_AUDIO_LAYOUT_8CH; in hdmi4_audio_config()
Dhdmi.h224 enum hdmi_core_audio_layout layout; member
/drivers/watchdog/
Dqcom-wdt.c52 const u32 *layout; member
57 return wdt->base + wdt->layout[reg]; in wdt_addr()
210 wdt->layout = regs; in qcom_wdt_probe()
/drivers/gpu/drm/bridge/
Ddw-hdmi-ahb-audio.c409 u8 threshold, conf0, conf1, layout, ca; in dw_hdmi_prepare() local
445 layout = HDMI_FC_AUDSCONF_LAYOUT1; in dw_hdmi_prepare()
447 layout = HDMI_FC_AUDSCONF_LAYOUT0; in dw_hdmi_prepare()
452 writeb_relaxed(layout, dw->data.base + HDMI_FC_AUDSCONF); in dw_hdmi_prepare()
/drivers/md/bcache/
DKconfig6 a btree for indexing and the layout is optimized for SSDs.
/drivers/staging/lustre/lustre/ptlrpc/
DMakefile14 ptlrpc_objs += pers.o lproc_ptlrpc.o wiretest.o layout.o

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