Searched refs:mem_level (Results 1 – 2 of 2) sorted by relevance
945 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level) in fiji_populate_single_memory_level() argument956 (uint32_t *)(&mem_level->MinVoltage), &mem_level->MinMvdd); in fiji_populate_single_memory_level()962 mem_level->EnabledForThrottle = 1; in fiji_populate_single_memory_level()963 mem_level->EnabledForActivity = 0; in fiji_populate_single_memory_level()964 mem_level->UpHyst = 0; in fiji_populate_single_memory_level()965 mem_level->DownHyst = 100; in fiji_populate_single_memory_level()966 mem_level->VoltageDownHyst = 0; in fiji_populate_single_memory_level()967 mem_level->ActivityLevel = (uint16_t)data->mclk_activity_target; in fiji_populate_single_memory_level()968 mem_level->StutterEnable = false; in fiji_populate_single_memory_level()970 mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_single_memory_level()[all …]
845 uint32_t clock, struct SMU74_Discrete_MemoryLevel *mem_level) in polaris10_populate_single_memory_level() argument859 &mem_level->MinVoltage, &mem_level->MinMvdd); in polaris10_populate_single_memory_level()865 mem_level->MclkFrequency = clock; in polaris10_populate_single_memory_level()866 mem_level->EnabledForThrottle = 1; in polaris10_populate_single_memory_level()867 mem_level->EnabledForActivity = 0; in polaris10_populate_single_memory_level()868 mem_level->UpHyst = 0; in polaris10_populate_single_memory_level()869 mem_level->DownHyst = 100; in polaris10_populate_single_memory_level()870 mem_level->VoltageDownHyst = 0; in polaris10_populate_single_memory_level()871 mem_level->ActivityLevel = (uint16_t)data->mclk_activity_target; in polaris10_populate_single_memory_level()872 mem_level->StutterEnable = false; in polaris10_populate_single_memory_level()[all …]