| /drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | fiji_smc.c | 86 uint32_t clock, uint32_t *voltage, uint32_t *mvdd) in fiji_get_dependency_volt_by_clk() argument
91 *voltage = *mvdd = 0; in fiji_get_dependency_volt_by_clk()
117 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in fiji_get_dependency_volt_by_clk()
119 else if (dep_table->entries[i].mvdd) in fiji_get_dependency_volt_by_clk()
120 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in fiji_get_dependency_volt_by_clk()
142 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE; in fiji_get_dependency_volt_by_clk()
143 else if (dep_table->entries[i].mvdd) in fiji_get_dependency_volt_by_clk()
144 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in fiji_get_dependency_volt_by_clk()
716 uint32_t threshold, mvdd; in fiji_populate_single_graphic_level() local
726 (uint32_t *)(&level->MinVoltage), &mvdd); in fiji_populate_single_graphic_level()
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| D | polaris10_smc.c | 79 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in polaris10_get_dependency_volt_by_clk() argument
85 *voltage = *mvdd = 0; in polaris10_get_dependency_volt_by_clk()
110 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in polaris10_get_dependency_volt_by_clk()
112 else if (dep_table->entries[i].mvdd) in polaris10_get_dependency_volt_by_clk()
113 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in polaris10_get_dependency_volt_by_clk()
135 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE; in polaris10_get_dependency_volt_by_clk()
136 else if (dep_table->entries[i].mvdd) in polaris10_get_dependency_volt_by_clk()
137 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in polaris10_get_dependency_volt_by_clk()
683 uint32_t mvdd; in polaris10_populate_single_graphic_level() local
694 &level->MinVoltage, &mvdd); in polaris10_populate_single_graphic_level()
[all …]
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| D | tonga_smc.c | 102 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in tonga_get_dependecy_volt_by_clk() argument
132 if (allowed_clock_voltage_table->entries[i].mvdd) in tonga_get_dependecy_volt_by_clk()
133 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i].mvdd; in tonga_get_dependecy_volt_by_clk()
150 if (allowed_clock_voltage_table->entries[i-1].mvdd) in tonga_get_dependecy_volt_by_clk()
151 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i-1].mvdd; in tonga_get_dependecy_volt_by_clk()
534 uint32_t mvdd; in tonga_populate_single_graphic_level() local
544 &graphic_level->MinVoltage, &mvdd); in tonga_populate_single_graphic_level()
885 uint32_t mvdd = 0; in tonga_populate_single_memory_level() local
901 &memory_level->MinVoltage, &mvdd); in tonga_populate_single_memory_level()
912 memory_level->MinMvdd = mvdd; in tonga_populate_single_memory_level()
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| /drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | hwmgr_ppt.h | 38 uint16_t mvdd; member
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| D | hwmgr.c | 314 vol_table->entries[i].value = dep_table->entries[i].mvdd; in phm_get_svi2_mvdd_voltage_table()
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| D | process_pptables_v1_0.c | 407 mclk_table_record->mvdd = mclk_dep_record->usMvdd; in get_mclk_voltage_dependency_table()
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| /drivers/gpu/drm/radeon/ |
| D | rv770_smc.h | 111 RV770_SMC_VOLTAGE_VALUE mvdd; member
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| D | nislands_smc.h | 111 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member
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| D | rv730_dpm.c | 311 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv730_populate_smc_acpi_state()
368 &table->initialState.levels[0].mvdd); in rv730_populate_smc_initial_state()
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| D | sislands_smc.h | 156 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member
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| D | rv770_dpm.c | 669 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in rv770_convert_power_level_to_smc()
998 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv770_populate_smc_acpi_state()
1075 &table->initialState.levels[0].mvdd); in rv770_populate_smc_initial_state()
2250 u16 vddc, vddci, mvdd; in rv7xx_parse_pplib_clock_info() local
2251 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv7xx_parse_pplib_clock_info()
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| D | rv740_dpm.c | 392 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv740_populate_smc_acpi_state()
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| D | cypress_dpm.c | 757 ret = cypress_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in cypress_convert_power_level_to_smc()
1294 &table->initialState.levels[0].mvdd); in cypress_populate_smc_initial_state()
1456 cypress_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in cypress_populate_smc_acpi_state()
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| D | ni_dpm.c | 1749 ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in ni_populate_smc_initial_state()
1919 ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in ni_populate_smc_acpi_state()
2383 ni_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in ni_convert_power_level_to_smc()
3966 u16 vddc, vddci, mvdd; in ni_parse_pplib_clock_info() local
3967 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in ni_parse_pplib_clock_info()
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| D | radeon_atombios.c | 2370 u16 *vddc, u16 *vddci, u16 *mvdd) in radeon_atombios_get_default_voltages() argument
2380 *mvdd = 0; in radeon_atombios_get_default_voltages()
2390 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage); in radeon_atombios_get_default_voltages()
2402 u16 vddc, vddci, mvdd; in radeon_atombios_parse_pplib_non_clock_info() local
2404 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in radeon_atombios_parse_pplib_non_clock_info()
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| D | radeon_mode.h | 724 u16 *vddc, u16 *vddci, u16 *mvdd);
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| D | si_dpm.c | 4504 si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in si_populate_smc_initial_state()
4664 si_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in si_populate_smc_acpi_state()
5135 ret = si_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in si_convert_power_level_to_smc()
6842 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
6843 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
6848 si_pi->mvdd_bootup_value = mvdd; in si_parse_pplib_clock_info()
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| D | rv6xx_dpm.c | 1865 u16 vddc, vddci, mvdd; in rv6xx_parse_pplib_clock_info() local
1866 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv6xx_parse_pplib_clock_info()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.h | 217 u16 *vddc, u16 *vddci, u16 *mvdd);
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| D | si_dpm.h | 442 RV770_SMC_VOLTAGE_VALUE mvdd; member
762 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member
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| D | sislands_smc.h | 156 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member
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| D | amdgpu_atombios.c | 1185 u16 *vddc, u16 *vddci, u16 *mvdd) in amdgpu_atombios_get_default_voltages() argument
1195 *mvdd = 0; in amdgpu_atombios_get_default_voltages()
1205 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage); in amdgpu_atombios_get_default_voltages()
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| D | si_dpm.c | 4987 si_populate_initial_mvdd_value(adev, &table->initialState.levels[0].mvdd); in si_populate_smc_initial_state()
5145 si_populate_mvdd_value(adev, 0, &table->ACPIState.levels[0].mvdd); in si_populate_smc_acpi_state()
5615 ret = si_populate_mvdd_value(adev, pl->mclk, &level->mvdd); in si_convert_power_level_to_smc()
7255 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
7256 amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
7261 si_pi->mvdd_bootup_value = mvdd; in si_parse_pplib_clock_info()
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