Home
last modified time | relevance | path

Searched refs:native_mode (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_encoders.c151 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_panel_mode_fixup() local
152 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
153 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
154 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
155 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
156 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in amdgpu_panel_mode_fixup()
157 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in amdgpu_panel_mode_fixup()
159 adjusted_mode->clock = native_mode->clock; in amdgpu_panel_mode_fixup()
160 adjusted_mode->flags = native_mode->flags; in amdgpu_panel_mode_fixup()
162 adjusted_mode->hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup()
[all …]
Damdgpu_connectors.c389 amdgpu_encoder->native_mode = *preferred_mode; in amdgpu_get_native_mode()
391 amdgpu_encoder->native_mode.clock = 0; in amdgpu_get_native_mode()
401 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_lcd_native_mode() local
403 if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
404 native_mode->vdisplay != 0 && in amdgpu_connector_lcd_native_mode()
405 native_mode->clock != 0) { in amdgpu_connector_lcd_native_mode()
406 mode = drm_mode_duplicate(dev, native_mode); in amdgpu_connector_lcd_native_mode()
411 } else if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
412 native_mode->vdisplay != 0) { in amdgpu_connector_lcd_native_mode()
420 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in amdgpu_connector_lcd_native_mode()
[all …]
Datombios_encoders.c2024 lvds->native_mode.clock = in amdgpu_atombios_encoder_get_lcd_info()
2026 lvds->native_mode.hdisplay = in amdgpu_atombios_encoder_get_lcd_info()
2028 lvds->native_mode.vdisplay = in amdgpu_atombios_encoder_get_lcd_info()
2030 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2032 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2034 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in amdgpu_atombios_encoder_get_lcd_info()
2036 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2038 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()
2040 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in amdgpu_atombios_encoder_get_lcd_info()
2048 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in amdgpu_atombios_encoder_get_lcd_info()
[all …]
Damdgpu_display.c686 else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || in amdgpu_crtc_scaling_mode_fixup()
687 mode->vdisplay < amdgpu_encoder->native_mode.vdisplay) in amdgpu_crtc_scaling_mode_fixup()
692 memcpy(&amdgpu_crtc->native_mode, in amdgpu_crtc_scaling_mode_fixup()
693 &amdgpu_encoder->native_mode, in amdgpu_crtc_scaling_mode_fixup()
696 dst_v = amdgpu_crtc->native_mode.vdisplay; in amdgpu_crtc_scaling_mode_fixup()
698 dst_h = amdgpu_crtc->native_mode.hdisplay; in amdgpu_crtc_scaling_mode_fixup()
Damdgpu_mode.h394 struct drm_display_mode native_mode; member
428 struct drm_display_mode native_mode; member
448 struct drm_display_mode native_mode; member
/drivers/gpu/drm/radeon/
Dradeon_encoders.c325 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_panel_mode_fixup() local
326 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in radeon_panel_mode_fixup()
327 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in radeon_panel_mode_fixup()
328 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in radeon_panel_mode_fixup()
329 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in radeon_panel_mode_fixup()
330 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in radeon_panel_mode_fixup()
331 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in radeon_panel_mode_fixup()
333 adjusted_mode->clock = native_mode->clock; in radeon_panel_mode_fixup()
334 adjusted_mode->flags = native_mode->flags; in radeon_panel_mode_fixup()
337 adjusted_mode->hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup()
[all …]
Dradeon_connectors.c419 radeon_encoder->native_mode = *preferred_mode; in radeon_get_native_mode()
421 radeon_encoder->native_mode.clock = 0; in radeon_get_native_mode()
486 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_fp_native_mode() local
488 if (native_mode->hdisplay != 0 && in radeon_fp_native_mode()
489 native_mode->vdisplay != 0 && in radeon_fp_native_mode()
490 native_mode->clock != 0) { in radeon_fp_native_mode()
491 mode = drm_mode_duplicate(dev, native_mode); in radeon_fp_native_mode()
496 } else if (native_mode->hdisplay != 0 && in radeon_fp_native_mode()
497 native_mode->vdisplay != 0) { in radeon_fp_native_mode()
505 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in radeon_fp_native_mode()
[all …]
Dradeon_legacy_crtc.c63 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set() local
110 if (native_mode->hdisplay == 0 || in radeon_legacy_rmx_mode_set()
111 native_mode->vdisplay == 0) { in radeon_legacy_rmx_mode_set()
115 if (xres > native_mode->hdisplay) in radeon_legacy_rmx_mode_set()
116 xres = native_mode->hdisplay; in radeon_legacy_rmx_mode_set()
117 if (yres > native_mode->vdisplay) in radeon_legacy_rmx_mode_set()
118 yres = native_mode->vdisplay; in radeon_legacy_rmx_mode_set()
120 if (xres == native_mode->hdisplay) in radeon_legacy_rmx_mode_set()
122 if (yres == native_mode->vdisplay) in radeon_legacy_rmx_mode_set()
134 / native_mode->hdisplay + 1; in radeon_legacy_rmx_mode_set()
[all …]
Dradeon_combios.c1125 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1129 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1133 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()
1137 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()
1140 if ((lvds->native_mode.hdisplay < 640) || in radeon_legacy_get_lvds_info_from_regs()
1141 (lvds->native_mode.vdisplay < 480)) { in radeon_legacy_get_lvds_info_from_regs()
1142 lvds->native_mode.hdisplay = 640; in radeon_legacy_get_lvds_info_from_regs()
1143 lvds->native_mode.vdisplay = 480; in radeon_legacy_get_lvds_info_from_regs()
1163 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, in radeon_legacy_get_lvds_info_from_regs()
1164 lvds->native_mode.vdisplay); in radeon_legacy_get_lvds_info_from_regs()
[all …]
Dradeon_atombios.c1649 lvds->native_mode.clock = in radeon_atombios_get_lvds_info()
1651 lvds->native_mode.hdisplay = in radeon_atombios_get_lvds_info()
1653 lvds->native_mode.vdisplay = in radeon_atombios_get_lvds_info()
1655 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1657 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1659 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in radeon_atombios_get_lvds_info()
1661 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
1663 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
1665 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_atombios_get_lvds_info()
1673 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in radeon_atombios_get_lvds_info()
[all …]
Dradeon_mode.h351 struct drm_display_mode native_mode; member
393 struct drm_display_mode native_mode; member
437 struct drm_display_mode native_mode; member
474 struct drm_display_mode native_mode; member
Dradeon_display.c1741 else if (mode->hdisplay < radeon_encoder->native_mode.hdisplay || in radeon_crtc_scaling_mode_fixup()
1742 mode->vdisplay < radeon_encoder->native_mode.vdisplay) in radeon_crtc_scaling_mode_fixup()
1747 memcpy(&radeon_crtc->native_mode, in radeon_crtc_scaling_mode_fixup()
1748 &radeon_encoder->native_mode, in radeon_crtc_scaling_mode_fixup()
1751 dst_v = radeon_crtc->native_mode.vdisplay; in radeon_crtc_scaling_mode_fixup()
1753 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup()
/drivers/video/
Dof_display_timing.c140 struct device_node *native_mode; in of_get_display_timings() local
174 native_mode = entry; in of_get_display_timings()
192 disp->native_mode = 0; in of_get_display_timings()
217 if (native_mode == entry) in of_get_display_timings()
218 disp->native_mode = disp->num_timings; in of_get_display_timings()
228 of_node_put(native_mode); in of_get_display_timings()
232 disp->native_mode + 1); in of_get_display_timings()
237 of_node_put(native_mode); in of_get_display_timings()
Dof_videomode.c44 index = disp->native_mode; in of_get_videomode()
/drivers/gpu/drm/nouveau/
Dnouveau_connector.c698 struct drm_display_mode *native = nv_connector->native_mode, *m; in nouveau_connector_scaler_modes_add()
734 struct drm_display_mode *mode = nv_connector->native_mode; in nouveau_connector_detect_depth()
788 if (nv_connector->native_mode) { in nouveau_connector_get_modes()
789 drm_mode_destroy(dev, nv_connector->native_mode); in nouveau_connector_get_modes()
790 nv_connector->native_mode = NULL; in nouveau_connector_get_modes()
802 nv_connector->native_mode = drm_mode_duplicate(dev, &mode); in nouveau_connector_get_modes()
815 if (!nv_connector->native_mode) in nouveau_connector_get_modes()
816 nv_connector->native_mode = in nouveau_connector_get_modes()
818 if (ret == 0 && nv_connector->native_mode) { in nouveau_connector_get_modes()
821 mode = drm_mode_duplicate(dev, nv_connector->native_mode); in nouveau_connector_get_modes()
[all …]
Dnouveau_connector.h82 struct drm_display_mode *native_mode; member
Dnv50_display.c764 if (nv_connector && nv_connector->native_mode) { in nv50_crtc_set_scale()
771 omode = nv_connector->native_mode; in nv50_crtc_set_scale()
1526 if (nv_connector && nv_connector->native_mode) { in nv50_encoder_mode_fixup()
1543 drm_mode_copy(adjusted_mode, nv_connector->native_mode); in nv50_encoder_mode_fixup()
/drivers/gpu/drm/nouveau/dispnv04/
Ddfp.c189 if (!nv_connector->native_mode || in nv04_dfp_mode_fixup()
191 mode->hdisplay > nv_connector->native_mode->hdisplay || in nv04_dfp_mode_fixup()
192 mode->vdisplay > nv_connector->native_mode->vdisplay) { in nv04_dfp_mode_fixup()
196 nv_encoder->mode = *nv_connector->native_mode; in nv04_dfp_mode_fixup()
197 adjusted_mode->clock = nv_connector->native_mode->clock; in nv04_dfp_mode_fixup()
595 if (connector && connector->native_mode) in nv04_dfp_restore()
598 connector->native_mode->clock); in nv04_dfp_restore()
/drivers/gpu/drm/tilcdc/
Dtilcdc_panel.c172 if (timings->native_mode == i) in panel_connector_get_modes()