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Searched refs:octeon_write_csr64 (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/cavium/liquidio/
Dcn66xx_device.c35 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
40 octeon_write_csr64(oct, CN6XXX_SLI_SCRATCH1, 0x1234ULL); in lio_cn6xxx_soft_reset()
57 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
121 octeon_write_csr64(oct, CN6XXX_SLI_S2M_PORTX_CTL(oct->pcie_port), r64); in lio_cn6xxx_setup_pcie_mrrs()
169 octeon_write_csr64(oct, CN6XXX_SLI_PKT_INSTR_RD_SIZE, in lio_cn6xxx_setup_global_input_regs()
173 octeon_write_csr64(oct, CN6XXX_SLI_IN_PCIE_PORT, in lio_cn6xxx_setup_global_input_regs()
197 octeon_write_csr64(oct, CN6XXX_SLI_PKT_CTL, pktctl); in lio_cn66xx_setup_pkt_ctl_regs()
206 octeon_write_csr64(oct, CN6XXX_SLI_PKT_PCIE_PORT64, in lio_cn6xxx_setup_global_output_regs()
210 octeon_write_csr64(oct, CN6XXX_SLI_OQ_WMARK, 32); in lio_cn6xxx_setup_global_output_regs()
213 octeon_write_csr64(oct, CN6XXX_SLI_OQ_WMARK, 0); in lio_cn6xxx_setup_global_output_regs()
[all …]
Dcn23xx_pf_device.c219 octeon_write_csr64(oct, CN23XX_WIN_WR_MASK_REG, 0xFF); in cn23xx_pf_soft_reset()
224 octeon_write_csr64(oct, CN23XX_SLI_SCRATCH1, 0x1234ULL); in cn23xx_pf_soft_reset()
243 octeon_write_csr64(oct, CN23XX_WIN_WR_MASK_REG, 0xFF); in cn23xx_pf_soft_reset()
337 octeon_write_csr64(oct, CN23XX_SLI_PKT_MAC_RINFO64(mac_no, pf_num), in cn23xx_setup_global_mac_regs()
363 octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), d64); in cn23xx_reset_io_queues()
384 octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_reset_io_queues()
425 octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_pf_setup_global_input_regs()
447 octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_pf_setup_global_input_regs()
476 octeon_write_csr64(oct, CN23XX_SLI_OQ_WMARK, 32); in cn23xx_pf_setup_global_output_regs()
479 octeon_write_csr64(oct, CN23XX_SLI_OQ_WMARK, 0); in cn23xx_pf_setup_global_output_regs()
[all …]
Dcn68xx_device.c83 octeon_write_csr64(oct, CN68XX_SLI_TX_PIPE, tx_pipe); in lio_cn68xx_setup_pkt_ctl_regs()
90 octeon_write_csr64(oct, CN6XXX_SLI_PKT_CTL, pktctl); in lio_cn68xx_setup_pkt_ctl_regs()
106 octeon_write_csr64(oct, CN6XXX_SLI_WINDOW_CTL, 0x200000ULL); in lio_cn68xx_setup_device_regs()
Docteon_device.h611 #define octeon_write_csr64(oct_dev, reg_off, val64) \ macro
Dlio_main.c214 octeon_write_csr64( in octeon_droq_bh()
217 octeon_write_csr64( in octeon_droq_bh()
1340 octeon_write_csr64(oct_dev, CN23XX_SLI_SCRATCH1, in liquidio_probe()
4316 octeon_write_csr64(octeon_dev, CN23XX_SLI_SCRATCH1, in octeon_device_init()
Dlio_ethtool.c1502 octeon_write_csr64( in oct_cfg_rx_intrcnt()
1557 octeon_write_csr64(oct, in oct_cfg_rx_intrtime()