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Searched refs:p5 (Results 1 – 8 of 8) sorted by relevance

/drivers/staging/skein/
Dskein_block.c137 #define ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num) \ argument
145 X##p4 += X##p5; \
146 X##p5 = rol64(X##p5, ROT##_2); \
147 X##p5 ^= X##p4; \
154 #define R512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num) /* unrolled */ \ argument
155 ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num)
171 #define R512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num) \ argument
172 ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num) \
227 #define ROUND1024(p0, p1, p2, p3, p4, p5, p6, p7, p8, p9, pA, pB, pC, pD, pE, \ argument
236 X##p4 += X##p5; \
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/drivers/media/i2c/soc_camera/
Dmt9t112.c279 int m, n, p1, p2, p3, p4, p5, p6, p7; in mt9t112_clock_info() local
295 p5 = n & 0x000f; in mt9t112_clock_info()
325 clk = vco / (p5+1); in mt9t112_clock_info()
382 u8 p4, u8 p5, u8 p6, in mt9t112_set_pll_dividers() argument
402 ((p5 & 0x0F) << 4) | in mt9t112_set_pll_dividers()
432 priv->info->divider.p5, in mt9t112_init_pll()
/drivers/net/wireless/marvell/libertas/
Ddebugfs.c61 int p1, p2, p3, p4, p5, p6; in lbs_sleepparams_write() local
68 ret = sscanf(buf, "%d %d %d %d %d %d", &p1, &p2, &p3, &p4, &p5, &p6); in lbs_sleepparams_write()
77 sp.sp_extsleepclk = p5; in lbs_sleepparams_write()
DREADME102 echo "p1 p2 p3 p4 p5 p6" > sleepparams: writes the sleepclock configuration.
109 p5 is Control the use of external sleep clock (0-2)
/drivers/scsi/aacraid/
Dsa.c158 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in sa_sync_cmd() argument
Daacraid.h555 …int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5,…
1267 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ argument
1268 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
Drx.c167 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in rx_sync_cmd() argument
Dsrc.c204 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in src_sync_cmd() argument