Searched refs:pcie_dpm_enable_mask (Results 1 – 10 of 10) sorted by relevance
173 uint32_t pcie_dpm_enable_mask; member
2341 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { in smu7_force_dpm_highest()2343 tmp = data->dpm_level_enable_mask.pcie_dpm_enable_mask; in smu7_force_dpm_highest()2451 if (data->dpm_level_enable_mask.pcie_dpm_enable_mask) { in smu7_force_dpm_lowest()2453 data->dpm_level_enable_mask.pcie_dpm_enable_mask); in smu7_force_dpm_lowest()3517 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in smu7_generate_dpm_level_enable_mask()4037 uint32_t tmp = mask & data->dpm_level_enable_mask.pcie_dpm_enable_mask; in smu7_force_clock_level()
113 u32 pcie_dpm_enable_mask; member
2753 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_populate_smc_link_level()3963 if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_upload_dpm_level_enable_mask()3966 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); in ci_upload_dpm_level_enable_mask()4312 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_generate_dpm_level_enable_mask()4339 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_dpm_force_performance_level()4341 tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask; in ci_dpm_force_performance_level()4432 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_dpm_force_performance_level()4434 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); in ci_dpm_force_performance_level()6528 uint32_t tmp = mask & pi->dpm_level_enable_mask.pcie_dpm_enable_mask; in ci_dpm_force_clock_level()
112 u32 pcie_dpm_enable_mask; member
2626 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_populate_smc_link_level()3825 if (pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_upload_dpm_level_enable_mask()3828 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); in ci_upload_dpm_level_enable_mask()4170 pi->dpm_level_enable_mask.pcie_dpm_enable_mask = in ci_generate_dpm_level_enable_mask()4197 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_dpm_force_performance_level()4199 tmp = pi->dpm_level_enable_mask.pcie_dpm_enable_mask; in ci_dpm_force_performance_level()4285 pi->dpm_level_enable_mask.pcie_dpm_enable_mask) { in ci_dpm_force_performance_level()4287 pi->dpm_level_enable_mask.pcie_dpm_enable_mask); in ci_dpm_force_performance_level()
607 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in fiji_populate_smc_link_level()831 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in fiji_populate_all_graphic_levels()832 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in fiji_populate_all_graphic_levels()836 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in fiji_populate_all_graphic_levels()837 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in fiji_populate_all_graphic_levels()842 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in fiji_populate_all_graphic_levels()
545 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in polaris10_populate_smc_link_level()806 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && in polaris10_populate_all_graphic_levels()807 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in polaris10_populate_all_graphic_levels()811 while (hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask && in polaris10_populate_all_graphic_levels()812 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in polaris10_populate_all_graphic_levels()817 ((hw_data->dpm_level_enable_mask.pcie_dpm_enable_mask & in polaris10_populate_all_graphic_levels()
430 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in tonga_populate_smc_link_level()658 if (0 == data->dpm_level_enable_mask.pcie_dpm_enable_mask) in tonga_populate_all_graphic_levels()661 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in tonga_populate_all_graphic_levels()662 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in tonga_populate_all_graphic_levels()667 while (data->dpm_level_enable_mask.pcie_dpm_enable_mask && in tonga_populate_all_graphic_levels()668 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in tonga_populate_all_graphic_levels()674 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in tonga_populate_all_graphic_levels()
625 data->dpm_level_enable_mask.pcie_dpm_enable_mask = in iceland_populate_smc_link_level()863 while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in iceland_populate_all_graphic_levels()868 while ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in iceland_populate_all_graphic_levels()874 ((data->dpm_level_enable_mask.pcie_dpm_enable_mask & in iceland_populate_all_graphic_levels()