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Searched refs:pll_id (Results 1 – 23 of 23) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_pll.c272 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_use_mask()
273 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); in amdgpu_pll_get_use_mask()
300 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_dp_ppll()
301 return test_amdgpu_crtc->pll_id; in amdgpu_pll_get_shared_dp_ppll()
338 if (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID) in amdgpu_pll_get_shared_nondp_ppll()
339 return test_amdgpu_crtc->pll_id; in amdgpu_pll_get_shared_nondp_ppll()
346 (test_amdgpu_crtc->pll_id != ATOM_PPLL_INVALID)) in amdgpu_pll_get_shared_nondp_ppll()
347 return test_amdgpu_crtc->pll_id; in amdgpu_pll_get_shared_nondp_ppll()
Datombios_crtc.c242 int pll_id, in amdgpu_atombios_crtc_program_ss() argument
265 pll_id == adev->mode_info.crtcs[i]->pll_id) { in amdgpu_atombios_crtc_program_ss()
279 switch (pll_id) { in amdgpu_atombios_crtc_program_ss()
563 static bool is_pixel_clock_source_from_pll(u32 encoder_mode, int pll_id) in is_pixel_clock_source_from_pll() argument
566 if (pll_id < ATOM_EXT_PLL1) in is_pixel_clock_source_from_pll()
577 int pll_id, in amdgpu_atombios_crtc_program_pll() argument
612 args.v1.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll()
622 args.v2.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll()
632 args.v3.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll()
651 (pll_id < ATOM_EXT_PLL1)) in amdgpu_atombios_crtc_program_pll()
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Datombios_crtc.h44 int pll_id,
Ddce_v6_0.c2182 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v6_0_crtc_disable()
2190 switch (amdgpu_crtc->pll_id) { in dce_v6_0_crtc_disable()
2194 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v6_0_crtc_disable()
2201 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v6_0_crtc_disable()
2256 amdgpu_crtc->pll_id = dce_v6_0_pick_pll(crtc); in dce_v6_0_crtc_mode_fixup()
2258 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v6_0_crtc_mode_fixup()
2319 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v6_0_crtc_init()
Datombios_encoders.c776 int pll_id = 0; in amdgpu_atombios_encoder_setup_dig_transmitter() local
807 pll_id = amdgpu_crtc->pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
975 args.v3.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
1037 args.v4.acConfig.ucRefClkSource = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
1102 args.v5.asConfig.ucPhyClkSrcId = pll_id; in amdgpu_atombios_encoder_setup_dig_transmitter()
Ddce_v8_0.c2714 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v8_0_crtc_disable()
2722 switch (amdgpu_crtc->pll_id) { in dce_v8_0_crtc_disable()
2726 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v8_0_crtc_disable()
2734 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v8_0_crtc_disable()
2741 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v8_0_crtc_disable()
2795 amdgpu_crtc->pll_id = dce_v8_0_pick_pll(crtc); in dce_v8_0_crtc_mode_fixup()
2797 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v8_0_crtc_mode_fixup()
2858 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v8_0_crtc_init()
Ddce_virtual.c245 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_disable()
341 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_virtual_crtc_init()
Ddce_v11_0.c2842 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v11_0_crtc_disable()
2850 switch (amdgpu_crtc->pll_id) { in dce_v11_0_crtc_disable()
2855 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v11_0_crtc_disable()
2865 amdgpu_atombios_crtc_program_pll(crtc, ATOM_CRTC_INVALID, amdgpu_crtc->pll_id, in dce_v11_0_crtc_disable()
2872 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_disable()
2899 amdgpu_crtc->pll_id, in dce_v11_0_crtc_mode_set()
2943 amdgpu_crtc->pll_id = dce_v11_0_pick_pll(crtc); in dce_v11_0_crtc_mode_fixup()
2945 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v11_0_crtc_mode_fixup()
3026 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v11_0_crtc_init()
Ddce_v10_0.c2826 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v10_0_crtc_disable()
2834 switch (amdgpu_crtc->pll_id) { in dce_v10_0_crtc_disable()
2839 amdgpu_atombios_crtc_program_pll(crtc, amdgpu_crtc->crtc_id, amdgpu_crtc->pll_id, in dce_v10_0_crtc_disable()
2846 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_disable()
2900 amdgpu_crtc->pll_id = dce_v10_0_pick_pll(crtc); in dce_v10_0_crtc_mode_fixup()
2902 if ((amdgpu_crtc->pll_id == ATOM_PPLL_INVALID) && in dce_v10_0_crtc_mode_fixup()
2983 amdgpu_crtc->pll_id = ATOM_PPLL_INVALID; in dce_v10_0_crtc_init()
Damdgpu_mode.h395 u32 pll_id; member
/drivers/gpu/drm/radeon/
Datombios_crtc.c393 static void atombios_disable_ss(struct radeon_device *rdev, int pll_id) in atombios_disable_ss() argument
398 switch (pll_id) { in atombios_disable_ss()
414 switch (pll_id) { in atombios_disable_ss()
443 int pll_id, in atombios_crtc_program_ss() argument
466 pll_id == rdev->mode_info.crtcs[i]->pll_id) { in atombios_crtc_program_ss()
481 switch (pll_id) { in atombios_crtc_program_ss()
500 switch (pll_id) { in atombios_crtc_program_ss()
522 args.v1.ucPpll = pll_id; in atombios_crtc_program_ss()
527 atombios_disable_ss(rdev, pll_id); in atombios_crtc_program_ss()
538 atombios_disable_ss(rdev, pll_id); in atombios_crtc_program_ss()
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Datombios_encoders.c1022 int pll_id = 0; in atombios_dig_transmitter_setup2() local
1054 pll_id = radeon_crtc->pll_id; in atombios_dig_transmitter_setup2()
1222 args.v3.acConfig.ucRefClkSource = pll_id; in atombios_dig_transmitter_setup2()
1284 args.v4.acConfig.ucRefClkSource = pll_id; in atombios_dig_transmitter_setup2()
1349 args.v5.asConfig.ucPhyClkSrcId = pll_id; in atombios_dig_transmitter_setup2()
Dradeon_mode.h352 int pll_id; member
/drivers/mfd/
Dtwl6040.c374 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, in twl6040_set_pll() argument
386 if (pll_id != twl6040->pll) { in twl6040_set_pll()
391 switch (pll_id) { in twl6040_set_pll()
415 if (twl6040->pll == pll_id) in twl6040_set_pll()
481 if (pll_id != twl6040->pll) in twl6040_set_pll()
503 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id); in twl6040_set_pll()
509 twl6040->pll = pll_id; in twl6040_set_pll()
/drivers/video/fbdev/omap2/omapfb/dss/
Ddss.c176 void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable) in dss_ctrl_pll_enable() argument
186 switch (pll_id) { in dss_ctrl_pll_enable()
197 DSSERR("illegal DSS PLL ID %d\n", pll_id); in dss_ctrl_pll_enable()
205 void dss_ctrl_pll_set_control_mux(enum dss_pll_id pll_id, in dss_ctrl_pll_set_control_mux() argument
217 switch (pll_id) { in dss_ctrl_pll_set_control_mux()
231 switch (pll_id) { in dss_ctrl_pll_set_control_mux()
247 switch (pll_id) { in dss_ctrl_pll_set_control_mux()
Ddss.h296 void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable);
297 void dss_ctrl_pll_set_control_mux(enum dss_pll_id pll_id,
/drivers/clk/
Dclk-nomadik.c518 u32 pll_id; in of_nomadik_pll_setup() local
523 if (of_property_read_u32(np, "pll-id", &pll_id)) { in of_nomadik_pll_setup()
529 hw = pll_clk_register(NULL, clk_name, parent_name, pll_id); in of_nomadik_pll_setup()
/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy.c145 void msm_dsi_phy_set_src_pll(struct msm_dsi_phy *phy, int pll_id, u32 reg, in msm_dsi_phy_set_src_pll() argument
151 if ((phy_id >= DSI_MAX) || (pll_id >= DSI_MAX)) in msm_dsi_phy_set_src_pll()
156 if (phy->cfg->src_pll_truthtable[phy_id][pll_id]) in msm_dsi_phy_set_src_pll()
Ddsi_phy.h88 void msm_dsi_phy_set_src_pll(struct msm_dsi_phy *phy, int pll_id, u32 reg,
/drivers/gpu/drm/omapdrm/dss/
Ddss.c181 void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable) in dss_ctrl_pll_enable() argument
191 switch (pll_id) { in dss_ctrl_pll_enable()
202 DSSERR("illegal DSS PLL ID %d\n", pll_id); in dss_ctrl_pll_enable()
Ddss.h267 void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable);
/drivers/gpu/drm/i915/
Dintel_dpll_mgr.c738 enum intel_dpll_id pll_id; in hsw_ddi_dp_get_dpll() local
742 pll_id = DPLL_ID_LCPLL_810; in hsw_ddi_dp_get_dpll()
745 pll_id = DPLL_ID_LCPLL_1350; in hsw_ddi_dp_get_dpll()
748 pll_id = DPLL_ID_LCPLL_2700; in hsw_ddi_dp_get_dpll()
755 pll = intel_get_shared_dpll_by_id(dev_priv, pll_id); in hsw_ddi_dp_get_dpll()
Dintel_display.c9952 enum intel_dpll_id pll_id; in ironlake_get_pipe_config() local
9967 pll_id = (enum intel_dpll_id) crtc->pipe; in ironlake_get_pipe_config()
9971 pll_id = DPLL_ID_PCH_PLL_B; in ironlake_get_pipe_config()
9973 pll_id= DPLL_ID_PCH_PLL_A; in ironlake_get_pipe_config()
9977 intel_get_shared_dpll_by_id(dev_priv, pll_id); in ironlake_get_pipe_config()